I am trying to simulate a frequency multiplier. For the purposes of this discussion, use the case of a 100MHz source multiplied up to 500MHz. This is a 5X frequency multiplication. The multiplication is not being done with a PLL, it uses harmonic generation methods.

There is a 100MHz signal source driving the multiplier input. Therefore PSS or QPSS form recognizes the 100MHz signal source. I am interested in phase noise at the 500MHz output at small relative offset frequencies. The signal source will have no phase noise, but the frequency multiplier will add phase noise in the process of multiplication. PSS and PNOISE simulations are successful, but the PNOISE analysis is run at 100MHz, not 500MHz, and is therefore not accurate. There is no way that I can see to specify that the PNOISE analysis be run at 500MHz, or post process the results at 500MHz instead of 100MHz.

The PSS simulation needs to run with a 100MHz beat frequency in order to capture everything that is happening over the 100MHz input period, but the noise analysis will not be accurate unless the output is analyzed or post-processed considering that it is 500MHz.

In old Cadence documentation, there is mention of a “frequency multiplier” parameter in the Main Form when post-processing PNOISE results, but this seems to have disappeared. I cannot find any other examples or forum posts of simulating phase noise in frequency multipliers.

I am using Virtuoso ADE version 5.10.41 for this particular project.

Can anyone lend a hand in solving this problem?