how to plot capacitance vs voltage in cadence virtuoso

Hi Venkateshjutur,

You will need to create a test bench with your varactor structure, switches and whatever layout parasitic elements are involved. You can excite the entire structure from the terminals that the inductor would be looking into with a DC voltage (possibly isolated with a very large indicator) and deterrmine the resulting small signal impedance. From the small signal impedance, you can derive the capacitance. This process is performed at every value of tune voltage. For large signal performance, the same process is followed except you use a transient simulation and apply a sinsusoidal current superimposed over the DC tune voltage. The resulting large signal impedance can be derived. This is something I do quite often.

Shawn

okay, can i get the plot like graph using calculator in cadence 

like the image i am uploading where they used Agilent ADS  

while exciting the entire structure from the terminals that the inductor would be looking into with a DC voltage,do we have to replace the inductor.

Also can you elaborate on how to determine small signal impedance to calculate the capacitance

 Yes. You can get a plot similar to whata you show from ADS.

 For the small signal capacitance, apply an AC current source between  the two terminals of your capacitive elements and monitor the voltage across them in a small-signal AC simulation. To feed a DC voltage across the terminals, use a large (ideal) inductor whose impedance will be very large at the freqency you are interested. Compute the impedance of your network at a given frequency from the expression Vac/Iac and compute the imaginary part to determine the effective capacitance. You may also wish to compute the real part. Store the expression as an output in ADE. Perform a parametized analysis over all values of DC voltage you are interested and ADE will plot the capacitance versus voltage.

Shawn