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pnoise spurs at multiples of clock frequency.

vamshiky

Hi,

 I have a simple inverter driven by a square wave, and ran pnoise on the circuit.

There is flicker and thermal noise and after that  has huge spurs ( about +20dBc ) at 2*Ffref , 5*Fref.

And this goes away if I carefully choose the sweep type and step size (delberately avoiding those freq points during sim). 

 

Also I have noticed from earlier posts that while running pnoise sim, simulator automatically skips the freq point which is exact multiple of beat frequency and gives a message "Infinite flicker noise is ignored"

however I dont see this happening in my sims.

Are there any additonal settings/options which I missed out.

 

Thanks,

Vamshi 

 

Parents

  • Dear Manuel,

    I am not Andrew and certainly do not possess his expertise, but if I understand your issue correctly, I think I can provide some insight.

    If you are stimulating your clock distribution path with a 100 MHz clock, and you examine its phase noise spectrum with a fundamental frequency of 100 MHz, you will definitely observe "spurs" (as you call them) at 100 MHz. The spurs are associated with the sampling process - effectively a phase sample is created every period of your 100 MHz clock. Hence, the resulting spectrum will be periodic and limited to fs/2 in its frequency content. Hence, I would recommend you perform your integration up to 50 MHz. Does this make sense to you?

    I'm also a little confused as to the goal of your simulation. Are you trying to measure the random noise due to the distribution path - or are you trying to assess the deterministic jitter of your clock distribution path? There may be an alternative to your strategy that I could suggest if you are interested and provide a bit more detail on the goal of your effort.

    Shawn

Reply

  • Dear Manuel,

    I am not Andrew and certainly do not possess his expertise, but if I understand your issue correctly, I think I can provide some insight.

    If you are stimulating your clock distribution path with a 100 MHz clock, and you examine its phase noise spectrum with a fundamental frequency of 100 MHz, you will definitely observe "spurs" (as you call them) at 100 MHz. The spurs are associated with the sampling process - effectively a phase sample is created every period of your 100 MHz clock. Hence, the resulting spectrum will be periodic and limited to fs/2 in its frequency content. Hence, I would recommend you perform your integration up to 50 MHz. Does this make sense to you?

    I'm also a little confused as to the goal of your simulation. Are you trying to measure the random noise due to the distribution path - or are you trying to assess the deterministic jitter of your clock distribution path? There may be an alternative to your strategy that I could suggest if you are interested and provide a bit more detail on the goal of your effort.

    Shawn

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