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Problem in plotting Cgs vs Vgs

anhnha

Hi.
I need to plot Cgs vs Vgs of a NMOS transistor. I have searched a lot and followed tutorial but still in vain. Below is my circuit for simulation. My schematic and setting is attached in the picture below. Here, I chose DC analyse, with Vgs sweeping from 0 to 2V.
I created a file, namely, oppoint.scs, and wrote its content as follows:
save M2:oppoint

Then I chose Netlist and Run.

However, the error below appeared.
(please see the attached file in the second post. I can't post two images in a single post).

I couldn't figure out why. I am completely new with Cadence and I can't use SKILL.
Hope you can help.
Thanks.

 

Parents

  •  Hi.

    Thanks a lot for the answer. You are right, The path is correct. However, the name of that file is incorrect. It has a space at the end and that makes it hard to debug.

    Now I have just completed Netlist and Run.  From ADE, I go to Tools ->  Results Browser and got the Results Browser wizard.

    I don't know how to plot Cgs vs Vgs next. Could you help me?

     

Reply

  •  Hi.

    Thanks a lot for the answer. You are right, The path is correct. However, the name of that file is incorrect. It has a space at the end and that makes it hard to debug.

    Now I have just completed Netlist and Run.  From ADE, I go to Tools ->  Results Browser and got the Results Browser wizard.

    I don't know how to plot Cgs vs Vgs next. Could you help me?

     

Children
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