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Strange simulation results about transient jitters of inverter's input and output

bjbit

Hi all,

I designed a cross-coupled LC oscillator with a few stages of inverters following its output. From PSS+Pnoise simulations I notice that the plotted jitter at the inverter output is smaller than the oscillator output (inverter input). In general thinking, the signal jitter should increase by the noise from additional circuits, right?

To double check it, I build another simple circuit. A noisy sinusoid voltage source connects to a inverter chain. The simulation shows the same result that inverter output jitter < input jitter. The technology is IBM_CMOS_7RF(180nm). Simulator environment is IC615+MMSIM13. I attach a screenshot of the simulation settings. Does anybody have the similar issue before? Please advise if any ideas. Thanks a lot.

Best regards,

bjbit 

Parents

  • Hi Frank,

    Thanks a lot for your advices. I have tried the settings you recommended and have some questions.

    Setting the absolute stop frequency at 400MHz does not cover the beat frequency. Do you actually mean setting the range to 400M~1.2GHz? Additionally, it seems with absolute frequency setting I can plot PSD but cannot plot phase noise spectrum and related jitter. From PSD plot it seems the sweep points should be enough.

    I set the frequency back to relative harmonics, and notice that when I set harmonic to 1, inverter output jitter > input jitter. But when I set harmonic to a large value (7 here), inverter output jitter < input jitter, which is confusing me. I thought for more accurate noise calculation the harmonic value should be set to high in order to include more foldered noise around high harmonics, right? Below I list the RMS single period jitters from my simulations as reference.

    Harmonic=7         inverter input jitter: 325fs             inverter output jitter: 14fs

    Harmonic=1         inverter input jitter: 46fs             inverter output jitter: 74fs

    Please let me know if any ideas. I appreciate your time and help.

    Best regards,

    bjbit 


Reply

  • Hi Frank,

    Thanks a lot for your advices. I have tried the settings you recommended and have some questions.

    Setting the absolute stop frequency at 400MHz does not cover the beat frequency. Do you actually mean setting the range to 400M~1.2GHz? Additionally, it seems with absolute frequency setting I can plot PSD but cannot plot phase noise spectrum and related jitter. From PSD plot it seems the sweep points should be enough.

    I set the frequency back to relative harmonics, and notice that when I set harmonic to 1, inverter output jitter > input jitter. But when I set harmonic to a large value (7 here), inverter output jitter < input jitter, which is confusing me. I thought for more accurate noise calculation the harmonic value should be set to high in order to include more foldered noise around high harmonics, right? Below I list the RMS single period jitters from my simulations as reference.

    Harmonic=7         inverter input jitter: 325fs             inverter output jitter: 14fs

    Harmonic=1         inverter input jitter: 46fs             inverter output jitter: 74fs

    Please let me know if any ideas. I appreciate your time and help.

    Best regards,

    bjbit 


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