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Phase noise simulation

lahsivece

Hi All,

I am simulating phase noise of a ring oscillator from 100Hz to 500MHz (pss +pnoise)

I am simulating phase noise of a free running oscillator ( Just a ring oscillator and no stimulus to ring oscillator ). The ring oscillator is parasitic extracted.

I am getting a phase noise profile which looks close to ideal specially beyond 100MHz (please see attached image). It is hitting close to spectre noise floor .  I have two doubts :

1) Is my simulation correct ? During the course of measurement, the free running oscilator will show  a phase noise profile which doesn't look anything like that shown by simulation ( Oscillator will drift and hence carrier will drift and hence phase noise measurement will be kind of wrong . Oscillator needs to be stabilized for measurement of phase noise)

2) Is there a way to make this good looking phase noise bad in simulation with free running ring oscillator. ( When I am using injection locked oscillator with injection source having the phase noise profile of a real source (agilent VSG) , I am getting almost correct phase noise profile)

 

Please advise

Thanks,

Vishal

Phase noise profile of free running osc

     

 

Parents

  •  Dear Vishal,

     > 1) Is my simulation correct ?

     I really can't make that judgement as I do not know the frequency of your phase noise measurement.  A good 10 MHz quartz controlled VCXO might have a open loop phase noise of -150 dBc/Hz at an offset of 100 kHz. This would correspond to a 500 MHz phase noise of -150 + 20log(500 MHz/10 MHz) = -116 dBc/Hz at an offset of 100 kHz. Your data suggests,perhaps, a value of -137 dBc/Hz at an offset of 100 kHz - which is much better if your measured frequency is 500 MHz. This would suggest the data is not that credible. However, if your measurement is at 10 MHz, then perhaps it is reasonable.

    > During the course of measurement, the free running oscilator will show  a phase noise profile which doesn't

    > look anything like that shown by simulation ( Oscillator will drift and hence carrier will drift and hence phase noise

    > measurement will be kind of wrong . Oscillator needs to be stabilized for measurement of phase noise)

     A common methodology used to characterize a ring VCO is to put in in as low a bandwidth PLL as possible and measure the phase noise of the resulting PLL above its loop bandwidth. The phase noise well above the PLL closed loop bandwidth will reflect that of the open loop VCO. There are other methods used to try to characterize ring VCOs that are available.

     

    > 2) Is there a way to make this good looking phase noise bad in simulation with free running ring oscillator.

    Increasing the temperature or, more directly,  reducing the power dissipation (reducing the amplitude of oscillation and open loop gain) will reduce the phase noise in general.

     

    Shawn

Reply

  •  Dear Vishal,

     > 1) Is my simulation correct ?

     I really can't make that judgement as I do not know the frequency of your phase noise measurement.  A good 10 MHz quartz controlled VCXO might have a open loop phase noise of -150 dBc/Hz at an offset of 100 kHz. This would correspond to a 500 MHz phase noise of -150 + 20log(500 MHz/10 MHz) = -116 dBc/Hz at an offset of 100 kHz. Your data suggests,perhaps, a value of -137 dBc/Hz at an offset of 100 kHz - which is much better if your measured frequency is 500 MHz. This would suggest the data is not that credible. However, if your measurement is at 10 MHz, then perhaps it is reasonable.

    > During the course of measurement, the free running oscilator will show  a phase noise profile which doesn't

    > look anything like that shown by simulation ( Oscillator will drift and hence carrier will drift and hence phase noise

    > measurement will be kind of wrong . Oscillator needs to be stabilized for measurement of phase noise)

     A common methodology used to characterize a ring VCO is to put in in as low a bandwidth PLL as possible and measure the phase noise of the resulting PLL above its loop bandwidth. The phase noise well above the PLL closed loop bandwidth will reflect that of the open loop VCO. There are other methods used to try to characterize ring VCOs that are available.

     

    > 2) Is there a way to make this good looking phase noise bad in simulation with free running ring oscillator.

    Increasing the temperature or, more directly,  reducing the power dissipation (reducing the amplitude of oscillation and open loop gain) will reduce the phase noise in general.

     

    Shawn

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