[Help] Errors exist in initialization of Verilog-A parameter arrays.

Errors are as below.

I've checked the "veriaref.pdf" file. And no mistake has been found. 

Can anyone help me, please?

Thanks in advance. 

 Much easier if you paste the code rather than a picture of it, as I had to type it in again to test it out.

You must be using a very old version, because the error message doesn't even appear like that in spectre from IC5141 (at least the most recent hotfix of IC5141 or IC5141 USR6). Also, the template hasn't included "disciplines.h" for some time.

I used this code:

`include "disciplines.h"

module testVA(vout);
output vout;
electrical vout;

parameter real I_gc [1:4] = {-5.0,-1,0,5.0,10.0};

analog begin
  $display("TESTING\n",I_gc[1],I_gc[2],I_gc[3],I_gc[4]);
end

endmodule

and in versions from MMSIM61 onwards this works (albeit with a warning because the initializer has 5 elements whereas the array only has 4 elements). 

If I use spectre from IC5141 or MMSIM60, I get:

Error found by spectre during SpectreHDL compile.
    "/export/home/andrewb/demos/SpectreRF/training/testVA/veriloga/veriloga.va",
        line 7: "parameter real I_gc [1:4] = {-5.0,-1,0,5.0,10.0};<<--? "
    "/export/home/andrewb/demos/SpectreRF/training/testVA/veriloga/veriloga.va",
        line 7: Error: arrays cannot be initialized.

 Anyway, with MMSIM61 or later it works OK. Assuming there wasn't some other typo in the file that I missed when I typed it in myself.

Regards,

Andrew.

Sorry to upload a picture. I will remember this.

I used spectre from IC5141.  The version is old which produced errors like above.

Thanks a lot for your help. Mr. Beckett.