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PSS analysis for 0.13um CMOS LNA design suddenly stop at 10 percent

encik RFIC

Hye, i am currently working on a design of LNA in 0.13um CMOS. Im done with s parameter and NF part and now Im trying to obtain a result from pss analysis for 1db compression Point and and IIP3. The bandwidth of this LNa is starting from 3G to10G hz. When Im doing the PSS analysis, its suddenly stop at 10 percent of iteration, meaning to say if we give the prf variable staring from -40 dBm to 0 dBm it only run until -36 dBm and the condition on ADE is turn to ready.

Please kindly help me. have try so many thing but nothing seems to work. really needs help here.
together with this thread im attached the screeshot of the output log,properties of input port, and pss analysis setting.

Parents

  • you did mention about the size of circuit, how it is affect the PSS analysis ? 
    i attached the schematic here...maybe you can figure something out from that..still trying to simulate the linearity properties here...the reason why im using older version is that i am  a student and only this version that my university provided...so we need to put out the choice of using newer version to simulate the 1 db compression point and the input IP3

    your advice is very much appreciated sir...please help me

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  • you did mention about the size of circuit, how it is affect the PSS analysis ? 
    i attached the schematic here...maybe you can figure something out from that..still trying to simulate the linearity properties here...the reason why im using older version is that i am  a student and only this version that my university provided...so we need to put out the choice of using newer version to simulate the 1 db compression point and the input IP3

    your advice is very much appreciated sir...please help me

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