Hidden States and SpectreRF: Is there a safe way to read DC values from file?

Hi Benjamin,

You didn't mention if you were using the Shooting engine or harmonic balance engine.  I assume the former.

The simulator needs to know the voltage/current on every net/node in the circuit at each time point in the simulation.

• There are components in the sample ahdl library that will cause hidden state problems. (the workaround is to change the internal variables to nodes)
• Any component which has data *not* stored in matrix, that is used in next (simulation) time point will cause hidden state problems.
• Any internal variable in an ahdl block that is not saved in the matrix.

For example:

Do you have a variable that's being used to hold states?

Do you set the value during one iteration, and the next iteration use that value?

These will cause hidden state problems.

• Information about transmission lines is stored outside the matrix.

When using the nport (s-parameter file), use the Broadband Spice (bbspice) interpolation method.

• Anything (any component) with a delay function has values that are stored outside the matrix and will cause hidden state problems.
• Primitives that *may* cause problems (due to the fact that all currents and voltages may not be stored in the matrix and therefore cause hidden state errors): msline, tline​
• Look for "td" (time delay) on your components. For example:

E17 (net1 VSS op1 on1) vcvs gain=1.0 td=0.66

Shooting PSS/QPSS has difficulty with nonzero td (i.e. if td is nonzero, there is delay). This is a known limitation of the shooting engine. Try using the harmonic balance engine instead.

For more information on Verilog A, Spectre RF, and hidden states, also see:

Cadence Verilog-A Language Reference Manual

Specifically see the sections entitled:

• Ignoring the State of a Verilog-A Module for RF Simulation, and
• Ignoring the State of a Verilog-A Local Variable for RF Simulation

best regards,

Tawna

 You may also want to check out these articles on Cadence Online Support    http://support.cadence.com

Article 11187476:  How to turn off hidden state checker when running pss/hb analysis.    

and

Article 20384843:  FAQ: SpectreRF Convergence tips for Shooting PSS analysis (Article 20409487 covers the same for HB)

Verilog A:

• Models designed with event-driven digital semantics in mind often do not work well in RF analyses.
  • Transient analyses require only the large-signal circuit behavior to be defined. Most RF analyses require that the small-signal behavior also be well-defined and well-behaved.
• Harmonic balance does not work well with discontinuities of any type, for example “transition” statement.
• “transition” statement is an issue for all RF analyses. Avoid if possible in RF analyses.
• “delay” is usually difficult for shooting. Consider removing or replace by lumped approximate element.

best regards,

Tawna

Why not use a vector file (as on the Setup->Simulation Files form?). This is covered in the "Digital Vector File Format" chapter of the Ultrasim User Guide (although spectre supports it equally well). This would allow you to do exactly what you want - no need to worry about VerilogA, about hidden states (although you could just add the (* instrument_module *) attribute before the module statement in the VerilogA since it's only a source and the hidden state detection can be safely turned off)

Regards,

Andrew.

Thank you Andrew

I added the (* instrument_module *) as you both suggested, and it seems to have worked.

Good idea with the "Digital Vector File Format".  That would probably have been a better solution.

Thanks for all of your good info on this blog.  I have found it useful countless times.

Ben

Thanks Tawna,

The article 11187476 had the solution, as also mentioned by Andrew (using * instrument_module *) .  I appreciate the quick reply.

Ben