s-param ports problem in Goldengate s-param simulation

Hello, i am trying to simulate my inductor s-param with goldengate . i have built the schematics and defined the simulation as shown bellow.

but it says that i havent defined sparam ports although i did defined  them in schematics .

i have added the error and the full log bellow.

i know that goldengate is a keysight product but my error is in the schematics step.

if still its beyong the scope i will try with spectre.

Thanks.

Executing: mccontrol inductor4_tst_SP.gg -ggparser -no_parallel -m amap -A ../psf -sim_output_file work -O 2 -o inductor4_tst_SP.gg.expanded.gg -I /projects/VLSI_labs/RFIC/yafimv/RF_090 -I .

mccontrol GoldenGate-2017-Update-0.2 (Tue 2018/10/16 17:22:09 UTC) (C) Keysight Technologies 2007-2018
Control program with pid 32113 started at 'Fri Jan 18 16:54:24 2019'.
ggparser GoldenGate-2017-Update-0.2 (Tue 2018/10/16 17:22:09 UTC) (C) Keysight Technologies 2007-2018
Parser started at Fri Jan 18 16:54:26 2019 (PID=32121).
Checking out a bundle license (will retry for up to one hour).
Bundle license check out time: 0.0348601 second(s).
Checking out a parser license (will retry for up to one hour).
Parser license check out time: 0.0184572 second(s).
Output cache directory: /a/home/cc/students/enginer/yafimv/.xpedion/cache/ahdl/
Parsing complete: 0s 244.867M.
Opened SimKit library libgg_elib_simkit_5_0.so.
Pre-elaboration complete: 0s 296.391M.
Elaborating...
Elaboration complete: 0s 296.391M.
Equation solve complete: 0s 296.391M.
Post-processing complete: 0s.
Print complete: 0s.
Execution complete: 1s 296.391M.
Total CPU Time : 1s.
/eda_disk/Keysight/GoldenGate-2017-Update-0.2/linux_x86_64/bin/ggsim: Successful parse.
##############################################################################
Executing: mccontrol inductor4_tst_SP.gg.expanded.gg -I /projects/VLSI_labs/RFIC/yafimv/RF_090 -I . -format ds -output_dir ../psf -output_data_dir . -warning inductor4_tst_SP.warning.log -error inductor4_tst_SP.error.log -no_parallel -liana

mccontrol GoldenGate-2017-Update-0.2 (Tue 2018/10/16 17:22:09 UTC) (C) Keysight Technologies 2007-2018
Control program with pid 32102 started at 'Fri Jan 18 16:54:31 2019'.

EEsof License Tools (*) Ver: 2018.04 Date: May 02,2018 Build: 108

GoldenGate (release ver. GoldenGate-2017-Update-0.2 build 6498 -- Oct 16 2018) (C) Keysight Technologies 2007-2018
Checking out a bundle license (will retry for up to one hour).
Bundle license check out time: 0.0524719 second(s).
Checking out a simulator license (will retry for up to one hour).
Simulator license check out time: 0.0173888 second(s).
Simulation 'at Fri Jan 18 16:54:34 2019, host micron.eng.tau.ac.il, process #32154'.
Total available memory : 31Gb, free: 10Gb
Current directory : '/data.cc/data/a/home/cc/students/enginer/yafimv/simulation/inductor4_tst/GoldenGate/schematic/netlist'.
GoldenGate binary : '/eda_disk/Keysight/GoldenGate-2017-Update-0.2/linux_x86_64/bin/liana_bin'
Argument list : 'inductor4_tst_SP.gg.expanded.gg -format ds -warning inductor4_tst_SP.warning.log -error inductor4_tst_SP.error.log -output_dir ../psf
-output_data_dir . -I /projects/VLSI_labs/RFIC/yafimv/RF_090 -I . '
main netlist file : inductor4_tst_SP.gg.expanded.gg.
Output directory : '/data.cc/data/a/home/cc/students/enginer/yafimv/simulation/inductor4_tst/GoldenGate/schematic/netlist/../psf'.
Output data directory : '.'.
Input data directory : '.'.
> Registry file list:
/eda_disk/Keysight/GoldenGate-2017-Update-0.2/etc/goldengate.conf

-------------------------------------------------------------------------------
* Exporting the following environment variables:

export GG_NETLIST_DIR = /data.cc/data/a/home/cc/students/enginer/yafimv/simulation/inductor4_tst/GoldenGate/schematic/netlist
export GG_IN_DATA = .
export GG_OUT_DATA = .
export GG_OUT_DIR = /data.cc/data/a/home/cc/students/enginer/yafimv/simulation/inductor4_tst/GoldenGate/schematic/netlist/../psf

* GoldenGate related environment variables values:

HOME = /a/home/cc/students/enginer/yafimv
XPEDION_DOT_DIR = /a/home/cc/students/enginer/yafimv/.xpedion
HPEESOF_DIR = /eda_disk/agilent/ADS2017
LD_LIBRARY_PATH = '/ahdl:/a/home/cc/students/enginer/yafimv/.xpedion/cache/ahdl:/eda_disk/Keysight/GoldenGate-2017-Update-0.2/linux_x86_64/lib64:/eda_disk/Keysight/GoldenGate-2017-Update-0.2/linux_x86_64/lib:/eda_disk/Keysight/GoldenGate-2017-Update-0.2/linux_x86_64/lib/32:/eda_disk/cadence/tools/IC/617_712/tools/lib:/eda_disk/cadence/tools/IC/617_712/share/oa/lib/linux_rhel50_gcc48x_64/opt:/eda_disk/cadence/tools/IC/617_712/tools.lnx86/Qt/64bit/lib:/eda_disk/cadence/tools/IC/617_712/tools.lnx86/dfII/lib/64bit:/eda_disk/cadence/tools/IC/617_712/tools.lnx86/sev/lib/64bit:/eda_disk/cadence/tools/IC/617_712/tools.lnx86/lib/64bit:/eda_disk/cadence/tools/IC/617_712/tools.lnx86/lib:/eda_disk/cadence/tools/IC/617_712/tools.lnx86/hdf5/lib/64bit:/eda_disk/cadence/tools/IC/617_712/tools.lnx86/lz4/lib/64bit:/eda_disk/cadence/tools/INCISIV/11.1/tools.lnx86/lib/64bit:/eda_disk/agilent/ADS2017/lib/linux_x86:/eda_disk/agilent/ADS2017/adsptolemy/lib.linux_x86:/eda_disk/agilent/ADS2017/lib/linux_x86_64:/eda_disk/agilent/ADS2017/adsptolemy/lib.linux_x86_64'

* Registry values:

Write Cache dir = $XPEDION_DOT_DIR/cache

-------------------------------------------------------------------------------

Reading file : 'inductor4_tst_SP.gg.expanded.gg' ( 0.00Mb).
Netlist reading time : 00:00.

-------------------------- Expanded Netlist Partlist --------------------------

port 2
snport 1
ccvns 1

total 4

-------------------------------------------------------------------------------
Expanding project file : 'inductor4_tst_SP'.
Expanding description...

Starting spare search...
...Finished spare search

** There are 0 spare nodes and 0 spare elements.
Cpu time for spare search: 00:00 ( 0.00 sec).

Expanding library elements...
Netlist expansion time : 00:00.
Using library hbsrc : (v. GoldenGate-2017-Update-0.2, Oct 16 2018, 11:44:11).
Performing kernel setup...
Random seed was set to 30105. It affects ET sources and internal functions. It does not affect statistical variables and Monte-Carlo simulation.
Circuit temperature : 27.00 C.
Nominal temperature : 27.00 C.
Element 'I0': Reading S-Parameter file : '/projects/inductor4/mommdl/text.txt'

------------------------ Internal GoldenGate Inventory ------------------------

external nodes 4
nodal matrix size 12
#netlist variables 37
#netlist equations 0
#non linear models 2
#non linear sources 0

Element part list:

* Internal instances:

base snport 1
base ccvns 1
base dspgv 2

total 4

* Library instances:

hbsrc port 2

total 2

Model part list:

spectre sine 2

total 2

-------------------------------------------------------------------------------
Circuit Signature '8e6b6be0e793eda1af7b8255e954dae3'.

-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
Elapsed time : cpu: 00:00 ( 0.04 sec), wall clock: 00:00 ( 0.17 sec).

Using multithread simulation. Number of threads = 4.

Performing 'nominal' task.
Error: SP: No S-port defined. [119.72]
Elapsed time : cpu: 00:00 ( 0.05 sec), wall clock: 00:02 ( 2.59 sec).
Writing data set file '/data.cc/data/a/home/cc/simulation/inductor4_tst/GoldenGate/schematic/netlist/../psf/inductor4_tst_SP.ds'.
Elapsed time : cpu: 00:00 ( 0.06 sec), wall clock: 00:03 ( 3.83 sec).
Total memory : 45.195M.
Simulation completed on 'Fri Jan 18 16:54:38 2019'.
Fatals: 0, Errors: 1, Warnings: 0 (0 suppressed)