Hello,my input signal is 3GHz and 0.3V i need my signal to be at least 0.7,so i built a common source amplifier by the principle of the schematics bellow.
as you can see,from my operating point simulation i have gm=10.48m my Rd=1K from the formula bellow A=gmRd ,so it needs to amplify my signal 10 times.
instead the signal is decreased as shown in the transient plot bellow.where did i go wrong?
maybe it's the output port putting impedance that i am not aware of?
You have the gate of the transistor fixed at 700mV, so there is very little influence of the sinusoidal input source to the left of the capacitor (other than because of charge sharing between the input cap and the capacitances from the gate within the transistor.
I assume you didn’t mean to hold the gate firmly at a fixed DC voltage when biasing it.
There’s no output port in the circuit so there won’t be any load impedance due to a “port”.
In addition to Mr Beckett's comment, which is absolutely correct, you wrote:
>...,my input signal is 3GHz and 0.3V i need my signal to be at least 0.7,
> so i built a common source amplifier by the principle of the schematics bellow.
> as you can see,from my operating point simulation i have gm=10.48m my
> Rd=1K from the formula bellow A=gmRd ,so it needs to amplify my signal 10 times.
However, the figure you have drawn labeled "CS" is not the circuit you are simulating. There are several issues:
1. As Mr. Beckett noted, in CS, there is a finite input impedance comprised of the parallel combination of RG1 and RG2. Hence, there is a high-pass filter whose cutoff frequency is approximately determined by the parallel combination of RG1 and RG2, and the AC coupling capacitor C1 (ignoring the capacitance of your input MOS device). In the circuit you are simulating, RG1 and RG2 are not present and the voltage source sets that impedance to 0 ohms. This suggests your high pass filter frequency is approaching infinity - which means there is no 3 GHz signal present at the MOS device. This simply states Mr. Beckett's comment in slightly different terms.
2. In your figure CS, there is an RS and and RD in series with the source and drain o its MOS device. The resulting gain formula shows that the gain of the circuit becomes largely insensitive to device gm for RSgm >> 1. This is a desired effect as one wants the gain to be less sensitive to gm as it can vary significantly with silicon process, temperature and voltage. However, in your schematic, you are not including RS. Hence, the gain becomes a direct function of RD and gm (as well as the MOS device's series resistances in the drain and source). This is not a desired feature as the gain is not robust.
3. In the example you show in your schematic, the DC operating point of your MOS device will not support any gain. Note that its VDS is only about 70 mV. The bias current through your device appears far too large as it is forcing its drain to a value very close to 0. In the design on a common source amplifier, one chooses the DC operating point of the device to allow sufficient drain-source voltage for linear amplification of the input signal over its desired output voltage swing. In your case, you want a 700 mV output swing for a 300 mV input swing. Hence, with a 1.20 V supply, it seems as if you want the drain voltage with no input signal to be a maximum pf 1.20 V - 0.350 V = 0.85 V. A lower value would be better for linearity.
4. Finally, relating to your comment "from the formula bellow A=gmRd ,so it needs to amplify my signal 10 times.", how are you expecting to observe a gain of 10 with a 300 mV input signal if your supply voltage is 1.20 V? 0.30 V X 10 = 3.0 V which far exceeds your supply voltage.
I might suggest, if I may Yefj, that your review your amplifier design methodology in a text such as "Analog Integrated Circuit Design", by Grey, Hurst, Lewis, and Meyer,. Chapter 3 covers the design of single and multistage amplifiers and I think you would find its Section 3.3.2 quite useful.
yefJ said:from the formula bellow A=gmRd ,so it needs to amplify my signal 10 times.
Thank you very much Andrew, the DC source imposed voltage without letting the AC source to have its influence,i tried Adding a resistor and it worked.