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  3. matching op capacitanances with impedance plot

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matching op capacitanances with impedance plot

robert 21
robert 21 over 5 years ago

Hello , I am trying to validate my output impedance plot with the OP parameters of the mosfets connected to the output.

the Cds and Cgd capacitances were shown in the zoomed plot bellow.

i have made an Idc source with AC=1V only. and plotted the imaginary part of the output node shown bellow wher Z_ac=V_ac/I_ac

imag(vfreq('ac "/net18"))  shown bellow.

However if we look at the imaginary part of the impedance and we see capacitance profile from the output Z_c=1/jwc then the plot should descend,instead it stays constant and starts to rise as if it was and inductor after 10M.

I tried to extract the capacitance from two points i notated on the plot bellow and both of them doesnt match the 10fF capacitance we should have.

Where did i go wrong matching the capacitance from the plot with the capacitane from the OP?

Thanks.

point 1:

42.1=1/(2*pi*10000*x)

3.7804×10^-7

point 2:

38.21*10^3=1/(2*pi*10000000*x)

4.16527×10^-13

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  • ShawnLogan
    ShawnLogan over 5 years ago

    Dear robert21,

    robert 21 said:
    However if we look at the imaginary part of the impedance and we see capacitance profile from the output Z_c=1/jwc then the plot should descend,instead it stays constant and starts to rise as if it was and inductor after 10M.

    You have defined your impedance measurement to shown the negative of the impedance. You need to rotate your output current source by 180 degrees.

    robert 21 said:

    I tried to extract the capacitance from two points i notated on the plot bellow and both of them doesnt match the 10fF capacitance we should have.

    Where did i go wrong matching the capacitance from the plot with the capacitane from the OP?

    You are totally neglecting the real impedance of your MOS devices. If their real impedance were infinite, then the output impedance would be set by the output capacitances of your devices. Consider the simple case of an output of one device model as a parallel combination of its output resistance and output capacitance. I took some time to show you the equivalent output impedance of a simplified model for an MOS drain as Figure 3 in the attached Adobe file. The real and imaginary impedances follow the same behavior as your simulation indicates (except for the negative sign to the polarity of your AC source. I also simulated a similar circuit shown as Figure 1 and plotted the imaginary impedance and capacitance directly as Figure 2. Please note that all are as expected with the simple model. It is not until high frequencies when the output device capacitances dominate the output impedance that you will see an effective capacitance close to the model parameters you show.

    I hope this helps. Once again, for your benefit, please take the time to think about the questions you are asking and, perhaps, put together a simple model as I did to see if that can explain your confusion. You need to develop an intuitive sense for what should be expected and this will help you understand if the simulation results are consistent with expectations. It is all part of the learning process.

    Shawn

    test_robert21_illustrations_sml_122019.pdf

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  • robert 21
    robert 21 over 5 years ago in reply to ShawnLogan

    Hello Shawn ,Thank you very much, so in order to see the output capacitance i have took a magnitude and phase from a point on the slope(shown bellow)

    Then i transfered them into rectangular real ,imaginary part , and using capacitor formula extracted the capacitance  as shown bellow.

    and this number represents the output capacitance we see from the idial current source  and it matches all the capacitances shown in the OP point.

    Correct?  

    33978.71=1/(2*pi*100000000*x)

    x=4.68396×10^-14

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  • ShawnLogan
    ShawnLogan over 5 years ago in reply to robert 21

    Dear robert21,

    Thank you for letting me know the information was somewhat helpful!

    robert 21 said:

    so in order to see the output capacitance i have took a magnitude and phase from a point on the slope(shown bellow)

    Then i transfered them into rectangular real ,imaginary part , and using capacitor formula extracted the capacitance  as shown bellow.

    and this number represents the output capacitance we see from the idial current source  and it matches all the capacitances shown in the OP point.

    Correct?  

    33978.71=1/(2*pi*100000000*x)

    x=4.68396×10^-14

    I believe you understand the basic issue your prior analysis was not a valid means to estimate the capacitance. However, I hope you realize that measuring the effective capacitance on the "slope" you noted only provides and estimate of the core device capacitances as the real part of their impedance is still forming some portion of the impedance. One method to better understand the degree to which the real part is playing a significant role in the capacitance computation is the following:

    1. Determine the real and imaginary parts of the simulated output impedance at several frequencies over the frequency region where the impedance shows capacitance behavior. (In lieu of choosing magnitude and phase, plot real {Zout} and Imag {Zout})

    2. For each imaginary impedance over that frequency region, compute the effective capacitance

    3. Plot the effective capacitance you compute versus the frequency at which the impedance was measured.

    4. Look for the region where the effective capacitance is not changing mch over frequency. This suggests that the real impedance over this frequency range is not playing a significant role in the effective capacitance. Hence, the effective capacitance over this range is a reasonably good estimate of the capacitive component due to capacitances (only).

    Shawn

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