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  3. QPSS with non-50% dutycycle square wave clocks (For sample...

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QPSS with non-50% dutycycle square wave clocks (For sample and hold)

ChrisG04
ChrisG04 over 5 years ago

Hello,

Would anyone know how to setup a PSS or QPSS simulation with 25% dutycycle clock sources or if such a thing is possible with QPSS.

Fig1 (below) is a snapshot of the circuit I am trying to characterize. This has 4 clock ports each with 25%duty cycle in the ON state. Fig2 below shows two of these clocks.

Each path in the circuit consists of two switches with a low pass RC sandwiched in between. The Input is a 50Ohm port sine wave and the output is a 1K resistor. The output nets of all paths are connected together.

I am trying to determine the swept frequency response from input to output (voltage) when the input is from 500Mhz to  510MHz. The Period (T=1/Fp) of each of the pulses is such that Fp=500MHz. The first pulse source has a delay=0, second has delay=T/4, third delay=2T/4, etc...

I am currently getting it working and seeing the correct result (bandpass response) with Transient but the problem is doing a dft at 500MHz with 10KHz spacings needs at least 100us and takes up a lot of time and disk space.

Many Thanks,
Chris.



Fig1


Fig2

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  • ChrisG04
    ChrisG04 over 5 years ago

    Slight error above, freq range should be 500MHz to 501MHz.

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  • ChrisG04
    ChrisG04 over 5 years ago

    Slight error above, freq range should be 500MHz to 501MHz.

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  • Andrew Beckett
    Andrew Beckett over 5 years ago in reply to ChrisG04

    There's no limitation with the RF analyses of requiring 50% duty cycles - this should work fine.

    Also, by the way, unless you really need a port with impedance, that's not a requirement for the RF analyses either (other than s-parameter analyses); using a voltage source (which doesn't have an output impedance) would be OK too. So you only really need to use port if you are concerned about having a matched impedance, for example - or are computing noise figure when you need a noisy source.

    Regards,

    Andrew.

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  • ChrisG04
    ChrisG04 over 5 years ago in reply to Andrew Beckett

    Hi Andrew,

    Thanks for the reply. Yes the port impedance is actually modelling the drive from a real LO so we can get some idea of current consumption (and hence power consumption) without using the actual LO driver in the sim.

    I have tried comparing the Tran with PSS-PAC analysis and it is working well for the fundamental but seems to grossly under predict the other harmonics. This filter has high 3rd harmonic content (about 10dBc) but PSS-PAC seems to show

    Below is the comparison between Tran and PSS sims for the fundamental (100MHz) response. These results tie in to within about 0.3dB.
    Fig.3

    Below is the comparison for the harmonics. As can be seen the differences between Fund and 2nd 3rd responses are are way off from the Transient sim.


    Fig.4

    This is using Spectre 18.1.0.335.isr6 64bit 19APR2019. Details of PSS and PAC analyses are below:


    Fig.5


    Fig.6

    It is very possible I have missed something here. Any suggestions appreciated.

    Many Thanks,
    Chris.

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  • Andrew Beckett
    Andrew Beckett over 5 years ago in reply to ChrisG04

    Hi Chris,

    Can you please share the input.scs with both the tran and pss/pac analyses, plus what you're doing to sweep the transient analysis and what measurements you're using do perform the FFT of the transient results.

    I think I know what the issue is, but I'd like to try your example to be sure.

    Thanks,

    Andrew.

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  • ChrisG04
    ChrisG04 over 5 years ago in reply to Andrew Beckett

    Hi Andrew,

    SCS_Files.zip
    Thanks. Attached are the two files.

    Transient sweep is through the variable frf1. Setting this to 100M:100K:101M

    FFT string is: dB20(dft(vtime('tran "/net_Vout") 0 10u 500000 "Rectangular" 1 "default" 1.0 ))

    Please let me know if you need any further information.

    Many Thanks,
    Chris.

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