• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. RF Design
  3. RF SPDT gives an error: Factorization of matrix failed due...

Stats

  • Locked Locked
  • Replies 8
  • Subscribers 64
  • Views 14751
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

RF SPDT gives an error: Factorization of matrix failed due to non-finite entries in the matrix

Zeke KJ7NLL
Zeke KJ7NLL over 4 years ago

Hello,

We are trying to see how many parallel capacitors might be needed to get the pF we need, but we are getting this error:

The schematic looks like this.  Basically when C2>0 or C3>0 it should use the capacitors, otherwise 1e9 Ohm resistors.  Can SPDT's not be used with RF circuits? 

  • Cancel
  • Tawna
    Tawna over 4 years ago

    What tool are you using?  And what version?

    best regards,

    Tawna

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Zeke KJ7NLL
    Zeke KJ7NLL over 4 years ago in reply to Tawna

    Microwave Office 15.01r build 10030 Rev 9.

    Its for this project: https://youtu.be/GLFeoOHoRuA

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • ShawnLogan
    ShawnLogan over 4 years ago in reply to Zeke KJ7NLL

    Dear Zeke KJ7NLL,

    Zeke KJ7NLL said:
    Microwave Office 15.01r build 10030 Rev 9.

    and 

    Zeke KJ7NLL said:
    The schematic looks like this.  Basically when C2>0 or C3>0 it should use the capacitors, otherwise 1e9 Ohm resistors.  Can SPDT's not be used with RF circuits

    I know nothing about Microwave Office, but I am wondering if in any of the simulations you are performing set C2=0 or C3=0? The motivation for the question is that the impedance of a capacitor as C gets close to 0 increases to a near infinite value. This will clearly result in a numerical error.

    What I might suggest to verify this possible hypothesis, you might alter your switch condition to use a value of Cmin in lieu of 0. In essence set Cmin to say 1e-15 F and set your two conditions to C2 > Cmin and C3 > Cmin and set C2 or C3 to, for example, 1e-16 F when you want to switch the states of your switches.

    Once again, I am not familiar with the tool you are using, but this came to mind as I read your error and examined your schematic and switch conditions - so I may be totally wrong! Just thought I would mention it just in case it helps...

    Shawn

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Zeke KJ7NLL
    Zeke KJ7NLL over 4 years ago in reply to ShawnLogan

    C1 and C2 aren't really capacitance, they are indexes into the Murata RF capacitor number (ie, C1=1 means 0.1pF because that is the first cap listed). 

    C1 and C2 are always integers.  I tried setting state to 1 or 0 and it still has a problem.  It works without the SPDT's (if they are removed or disabled and then bypassed), but adding the SPDTs causes the error.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • ShawnLogan
    ShawnLogan over 4 years ago in reply to Zeke KJ7NLL

    Dear Zeke KJ7NLL,

    Zeke KJ7NLL said:

    C1 and C2 aren't really capacitance, they are indexes into the Murata RF capacitor number (ie, C1=1 means 0.1pF because that is the first cap listed). 

    C1 and C2 are always integers.  I tried setting state to 1 or 0 and it still has a problem.  It works without the SPDT's (if they are removed or disabled and then bypassed), but adding the SPDTs causes the error.

    Thank you for educating me! 

    One more suggestion...if you are just trying to assess how many capacitors are required to achieve a specific capacitance...you might try removing your second SPDT switches and connect the second terminal of the capacitors to ground. I can't see your entire test bench, but I don't see a circuit ground defined.

    In other words, modify the topology to appear something like Figure 1.

    Once again, just another hypothesis...so please don't waste your time if the suggestion does not make sense in light of your needs.

    Shawn

    Figure 1

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • GraemeR
    GraemeR over 4 years ago in reply to ShawnLogan

    Hi Zeke,

    What you have looks correct.  Attached is a quick demo project using the same Murata Cap model in which you can tune the values of C1/C2/C3 to set the total capacitance.    This was built in v15.03 which is the current release using the latest Murata models.

    Best Regards,
    Graeme

    SPDT_Cap_Tuning.zip

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • GraemeR
    GraemeR over 4 years ago in reply to GraemeR

    I forgot but Microsoft released a Windows update that broke early v15 builds.    If you download v15.03 then it should be fine.  
    https://kb.awr.com/display/awrfaq/Factorization+of+Matrix+Failed+and+Other+Errors+after+Windows+10+Update).

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Zeke KJ7NLL
    Zeke KJ7NLL over 4 years ago in reply to GraemeR

    Thank you for the example that you made, it started magically working. If it happens again we will let you know.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information