Test-bench for Plotting negative Capacitance of Cross coupled Pair

Dear  Ashish,

I believe I understand exactly what you are interested in achieving, but also note a number of issues with your test bench and simulation methodology. Please bear with a few of my comments and suggestions as I am hoping, Ashish, one or two might provide some insight for you!

> I have connected the dc current source at the drain of the MOSFET to Provide Ibias.

This, combined with your driving port and its impedance, I don't believe this is biasing your MOS devices in a manner that emulates the small-signal behavior you are trying to observe. If you were to draw up a small-signal model of your test bench and compare it to the small-signal model of the cross-coupled pair, I think you might note the following:

a. There is no 50 ohms source impedance in the small-signal model between the two device drains
b. The common-mode source imedance in the small signal model is far less than the open circuit common mode impedance in your test bench
c. The DC mode common mode impedance of the device source terminals in the small-signal model is effectively infinite, whereas in your test bench, it is zero.

Hence, your resulting simulated result likely does not represent the impedance versus frequency transfer charactersitic you desire to obtain.

> At the Source terminal, I am using Large Inductors (1mH) to pass dc signal .

Although theoretically this makes perfect sense, the use of large value ideal inductors in a small-signal simulator can often lead to simulation issues. As a result, Cadence includes an "AC resistor" capability that avoids these issues. From the analogLib library, if you choose the "res" component, as shown in Figure 1, you can assign a "res" to have an AC value whose value is different than its DC value. In this fashion, you can set its AC impedance to a very large value. I might suggest its use in lieu of a large inductor. Does this make sense?

Finally, an sp analysis, in my mind is not required. I would suggest you utilize a more direct measurement of the impedance characteristic using a version of a test bench I have provided a few other Forum participants. Originally, I developed it to simulate the impedance characteristics of varactors, but it may also be used as a generic small-signal impedance simulator for both active and passive components. A recent post describing the test bench and its use may be found at URL:

community.cadence.com/.../1366802

A version to measure differential impedance is shown as Figure 2. The following expressions may be used to study the effective real and capacitance of the differential impedance. I might suggest you insert your cross-soupled pair drain impedances as the two test points and use a DC current source to bias their source nodes to your desired value (not your current source to the drains nor the ideal inductors.) Remove your port instance and perform a conventional small-signal AC analysis over the frequency range you are interested and study the effective real part and capacitance and or imaginary impedance. The effective resistance should be negative.

Effective real impedance versus frequency:

real(((v("/testp" ?result "ac") - v("/testn" ?result "ac")) / i("/ICAP/PLUS" ?result "ac")))

Effective capaciatance at 1 GHz:

(-1e+15 / (2 * 1e+09 * value(imag(((v("/testp" ?result "ac") - v("/testn" ?result "ac")) / i("/ICAP/PLUS" ?result "ac"))) 1e+09) * pi))

(remove value function to see effective capacitance versus frequency)

I hope this is somewhat useful Ashish!

Shawn

Figure 1

Figure 2

Dear Shawn,

Thanks for the reply . 

I still have few doubts regarding the schematic which you showed . 

It has 3 dc sources vssa vdda  test_dc out of which we are not using vdda. vssa I guess you are giving it a 0V although I am not sure as texts are overlapping in the figure. I am not sure where to connect test_dc circuit.

I am also not sure how does ICAP is measuring differential current .

An I have connected my two terminals of the XCP drains to test_probe and testn . Whether I shall connect between testp and testn.

Is the above Testbench fine ? Or it needs some changes.

Thanks in advance.

Dear Ashish,

Ashish Papreja said:

I still have few doubts regarding the schematic which you showed . 

It has 3 dc sources vssa vdda  test_dc out of which we are not using vdda. vssa I guess you are giving it a 0V although I am not sure as texts are overlapping in the figure. I am not sure where to connect test_dc circuit.

I am also not sure how does ICAP is measuring differential current .

I am sorry it was not clear to you! Let me try to clarify the test bench a bit more by answering your questions.

1. the 3 dc sources are in the test bench to allow various measurements on the DUT (device under test). Node vdda connected to a DC source with value "vdda_val"  forms a supply voltage in case your device under test requires a bias voltage. Node vssa is simply a net connected to ideal ground and is connected to the ideal ground with a 0 (zero) valued voltage source. test_dc is a node connected to the third ideal voltage source with value "dc_val". This node may be connected to the DUT if one wishes to examine its impedance as a function of, for example, a varactor voltage. For example, if one were studying the C-V characteristic of a varactor network, one could sweep  the variable vdc_val over the voltage range you are interested. Does this clarify the purpose of the three voltage sources and their values for you?

Ashish Papreja said:

I am also not sure how does ICAP is measuring differential current .

ICAP is connected in series with the two terminals of the DUT that are connected to the AC current sources (nodes testp and testn). Hence, it measures the differential current through the DUT. The ICAP probe current measurement is used to determine the differential impedance with the voltage measured across the terminals of the DUT..

Ashish Papreja said:

An I have connected my two terminals of the XCP drains to test_probe and testn . Whether I shall connect between testp and testn.

Your connection of the DUT to nodes test_probe and testn appears correct as does your setting of DC sources with value "vdc_val" to your 1.20 V supply appears correct. If you were to connect your DUT between testp and testn, you would NOT be able to measure the differential current through its terminals! This would be incorrect. This is why the screenshot of the test bench I provided in Figure 2 shows the terminal nodes test_probe and testn and NOT testp and testn.

I hope this helps to answer your questions Ashish.

Shawn

Dear Shawn,

Unknown said:

ICAP is connected in series with the two terminals of the DUT that are connected to the AC current sources (nodes testp and testn).

From the schematic, you showed isn't the ICAP measuring the same current which is flowing through ICAPp and not differential since it is connected to testp and test_probe and not testn . That is why I am confused regarding this that how is this measuring differential current. I am sorry if my doubt is silly but I haven't understood how is this measuring differential.

Dear Ashish,

I have illustrated in Figure 3 how the current through the current probe labeled ICAP is a measure of the differential current through the DUT. Negligible current flows through net test_dc as a result of the impedances placed in series with the net and vssa.

I hope this clarifies the question you posed.

Shawn

Figure 3

I got it !! 

Thanks for the explanation.

Dear Ashish,

Great! I hope your simulations work out too.

Shawn