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EMX - EM simulation for large CMOS chip

PhanKhai9898
PhanKhai9898 10 months ago

Hi everyone,

I'm currently working on my thesis, which involves a beamformer system using CMOS 65nm technology. I'm trying to use the EMX tool for EM simulation but have encountered a few problems. Before diving into my questions about EMX, let me briefly explain how I conduct EM simulations with other software (ADS).

In ADS, I use the EM simulator with the Momentum microwave engine. However, my EM layout is quite large, and the mesh generated is extremely detailed, making it difficult to simulate the entire system. As a workaround, I divide the system into smaller parts and simulate each one individually. I've attached a snapshot of my setup, which includes an amplifier and a 1-to-2 Wilkinson power divider. I've separated these circuits and placed pins to facilitate EM simulations for each. I also placed ground pins at the boundaries of each circuit to connect them to the ground plane.

Here’s the link to the image (I'm unable to upload it due to an error): https://drive.google.com/file/d/13Qn4-DvMBj_K1JQLXrTWaWZ8uaLJr15u/view?usp=sharing

Now, moving on to EMX (version 6.3). For a maximum frequency of 31 GHz, I set the edge mesh = thickness = 0.4 µm (approximately the skin depth). However, when I simulate the circuit (amplifier + divider), the mesh on the ground plane becomes very dense, which makes running the simulation impossible due to excessive memory requirements. I reverted to my ADS approach and divided the circuit into two parts, placing ports to connect them. Unfortunately, EMX doesn't allow me to place multiple edge ports on the same edge for the ground plane, which has left me confused. Here are a couple of questions I have:

  1. Is breaking the circuit into smaller parts a valid approach? Given the large ground plane, the mesh size for the ground is significant, making simulations challenging. Are there any methods to manage this issue?

  2. Regarding the ground pins, why can't I place multiple edge ports to connect the ground planes of both circuits as I did in ADS? If this approach is incorrect, could you suggest alternative methods for simulating individual circuits and connecting them to estimate system performance?

Any insights would be greatly appreciated. Thank you in advance for your help!

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  • ML20241023949
    ML20241023949 10 months ago

    If the layer used for the ground plane is different than the layer used for the EM interesting stuff, then just use a separate edge mesh value for that layer. The details are in the user manual.

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  • PhanKhai9898
    PhanKhai9898 10 months ago in reply to ML20241023949

    Hi ML20241023949 and sgcad ,

    I got your ideas, do you guy know why can't I place multiple edge ports to connect the ground planes of both circuits as I did in ADS?

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  • ML20241023949
    ML20241023949 10 months ago in reply to PhanKhai9898

    You should try the whole layout as one analysis with a different edge mesh on the ground plane layer before you resort to breaking up the layout.

    In EMX, ports cannot overlap each other because they are the points of excitation. EMX cannot both excite and solve a mesh element simultaneously.

    If you must resort to breaking up the layout, a single edge port on the ground plane edges will work, just do not set --uniform-sources when you have wide edge ports or that option will equally distribute the current in an unrealistic manner across the width of the port.

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  • ML20241023949
    ML20241023949 10 months ago in reply to PhanKhai9898

    You should try the whole layout as one analysis with a different edge mesh on the ground plane layer before you resort to breaking up the layout.

    In EMX, ports cannot overlap each other because they are the points of excitation. EMX cannot both excite and solve a mesh element simultaneously.

    If you must resort to breaking up the layout, a single edge port on the ground plane edges will work, just do not set --uniform-sources when you have wide edge ports or that option will equally distribute the current in an unrealistic manner across the width of the port.

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