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UVM RAL

bob65
bob65 over 1 year ago

I'm trying to use UVM RAL to write a single register field without affecting the other fields, but it seems it is not possible unless some specific hardware is implemented. 

But since     task uvm_reg_field::write is provided in UVM environment, I think I'm missing some sw setting rather than HW. I have tried  with  .individually_accessible option but with no effect.

 Please let me know if any suggestion!

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