Stats

  • Replies 0
  • Subscribers 65
  • Views 12900
  • Members are here 0
More Content

ECSet transfer into SiP Layout

MaxS

Hi everyone!

It is interesting to know how people perform the transfer of electrical constraints from a schematic engineer to layout engineer?

1) It is possible to get them automatically by from Orcad CIS through "Import Logic" command, but typically connectivity between dies and pkg is made by using a simple spreadsheet by the schematic engineer.

2) In this case, the schematic engineer can insert the information about impedance, delay and etc. right into the spreadsheet in front of each necessary net and put the responsibility of ECS creation on the layout engineer. In this case kind of double work happens.

3) Or schematic engineer can open SiP Layout, import just created netlist, then create ECSets and export them and finally transfer two files ahead to package design.

The third variant looks more attractive. But still, there are some doubts - why schematic engineer has to open SIP Layout? Maybe there are other variants? 

Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.