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  3. Generated netlist contains dangling nets when schematic...

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Generated netlist contains dangling nets when schematic uses non-primitive hierarchical blocks

ScreenName42
ScreenName42 over 2 years ago

I'm running into issues generating a valid netlist of a schematic. I'm using Capture CIS version 22.1 and I'm trying to export the schematic netlist into PADS. I normally do this is by clicking: Create Netlist -> "Other" Tab, and selecting the "orpads2k64.dll" formatter. I run into issues when the schematic contains non-primitive hierarchical blocks and the netlist generated contains dangling nets at the ports of the hierarchical blocks. The workaround at the moment is to set all the hierarchical blocks to primitive, which results is a correct netlist. However, this is rather impractical work-around as the design re-uses the same hierarchical block 10 times. Changing every re-used block to primitives, exporting, and changing them back to a non-primitives is a PITA.

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  • rg13
    0 rg13 over 2 years ago

    Tried with sample design but issue can't be seen at my end while creating pads netlist as you mentioned. I can see that hierarchical blocks are set as non-primitive at my end in design properties.

    It seems design specific issue. I would suggest you to create ticket for Cadence customer support.

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  • rg13
    0 rg13 over 2 years ago

    Tried with sample design but issue can't be seen at my end while creating pads netlist as you mentioned. I can see that hierarchical blocks are set as non-primitive at my end in design properties.

    It seems design specific issue. I would suggest you to create ticket for Cadence customer support.

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