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  3. Force capture schematic compiler to detect if one net has...

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Force capture schematic compiler to detect if one net has two names

frank mpbc
frank mpbc over 2 years ago

Hello,

Is there a way to make the schematic compiler detect two named net wires shorted together by accident? (See first picture.) This is equivalent to get a compiler error for one net with two different net alias names.

I only have the compiler detect the case where there is a part with internally named power pins and they don't match the names of the external ground and power nets. (See second and third pictures.)

I have OrCAD capture CIS 2019 17.4.

Thanks

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  • rg13
    0 rg13 over 2 years ago

    I doubt that there will be any automatic mechanism to identify that user has done some connection wrong by mistake. However, capture does show wire netlist that shows all the wired connection made in the design for quick check.

    Tools > Create netlist > 'Other' tab > orWirelist64.dll   /////you will find this option at the bottom of dropdown.

    You may like to check this option.

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  • frank mpbc
    0 frank mpbc over 2 years ago in reply to rg13

    Hello rg13,

    Thanks for your response. I checked the text file it produces. I could write a small program to parse it and look for problems. In this example, it made PE3 disappear when shorted. That makes sense, because it reduced the 2 independent nets into 1 net because of the short.

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  • AyushD
    0 AyushD over 2 years ago in reply to frank mpbc

    Its because in case of short, priority will be alphabetically that is why PE2 remains and PE3 disappears.

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