From Orcad Capture Schematic to PCB Layout

 Hi,

Cadence: Release 16.3

OS: Windows 7 - 32-bit

1) Create the simple circuit:I connected the resistor with GND and Power only no other special IC or other component.

2) Netlist: No Error

3) DRC file:
--------------------------------------------------
Checking Schematic:  SCHEMATIC1
--------------------------------------------------
Checking Electrical Rules

Checking For Single Node Nets
WARNING:  [DRC0006]  Net has fewer than two connections GND
                    SCHEMATIC1, PAGE1  (3.80, 1.50)
WARNING:  [DRC0006]  Net has fewer than two connections VCC
                    SCHEMATIC1, PAGE1  (3.80, 0.80)

Checking For Unconnected Bus Nets

Checking Physical Rules


Checking Pins and Pin Connections

--------------------------------------------------
Checking Schematic:  SCHEMATIC1
--------------------------------------------------

Checking Incorrect Pin Group Assignment

Report for Invalid References

Report for Duplicate References

--------------------------------------------------
Checking Entire Design: TESTING1
--------------------------------------------------

Checking Power Pin Visibility 

Checking Normal Convert View Sync 

Checking Missing Pin Numbers 

Checking Device with Zero pins 

Checking Missing PCB Footprint Property 

Checking Name Property for Hierarchical Instances 

Check High Speed Properties Syntax

Check Power Ground Mismatch

Reporting Unused Refdes in multiple part packages
Part                           Quantity                           Reference
-----------------------------------------------------------------------------------------

4) BOM List:

Item Quantity Reference Part

   1        1            R1      220

5) Create Netlist:

I check the "Create or Update PCB Editor Board (Netrev), and then i get popup "Info: Netrev succeeded with warning. Please refer to Session log or netrev.lst for details."

6) At Orcad PCB Designer:

popup: "WARNINGS(SPMHOD-33): Database was last saved by a higher tier tool…… Allegro Expert .There may be constraints,Rules and other design data that may be ignored in this tool."

Can somebody help me to solve this problem or can somebody teach me how to create PCB layout step by step and I want to know how to create my own pad fooprint with info "Recomended Solder Pad pitch and dimenesion" from datasheet.

Need feedback from somebody.