xnets

You can add a Comps level property (Edit - Object Properties then Comps in the Find pane) called NO_XNET_CONNECTION with a value of True which stops the xnet being created. This can also be added in the schematic.

Steve, assuming no constraints in the schematic are to be transferred to the PCB,

could checking the "ignore electrical constraints" box in the setup for exporting a netlist be an easy option?

We setup constraints at the board level and if we don't check the box our board level constraints get hosed.

So once you have invoked Constraint Manager at the front end (from Capture) the design get locked in a Constraint Flow and to avoid the issues you are seeing you MUST back annotate the board to the schematic which will transfer all the constraints from PCB to schematic. This does work very well.

Steve, you are correct.  I invoked the constraint manager in Capture (even tho I didn't use it) and then I started getting the xnets.  I add the property NO_XNET_CONNECTION and now the xnets are gone.  How did you find out about adding the property?  Sucks that Allegro forces me into a different flow without asking/warning that it's happening.

Thanks for the help.

Phil

The property has been around fo a long time but was to restrict xnets being created in the old flow if you use Signal Analysis. You are warned when you first invoke CM in Capture. The flow is really helpful if you want to set constraints, you just need to ensure you always back annotate once you start that flow. 17.4 is better with Design Sync