Stats

  • Replies 1
  • Subscribers 160
  • Views 14509
  • Members are here 0
More Content

Error when generating a step model of the PCB

marekmat

Hello everyone. I have been struggling with generating a step model of my PCB. 

I've been receiving such error:

(SPMHGE-268): step out had errors, use Viewlog to review the log file. 

Unfortunatelly, the log file is always empty and I don't even know where should I start to find a problem.

All STEP models of electronic elements are correct (I think). The icon of the DRC is red but I don't have any single error. What's going on?

  • Mhawley1

    I had the same problem , was aggrevating me to no end . The solution was one of the step files was corrupt . I had to do a process of elimination to find which one . I would remove all the steps and put them on one at a time till you get that error again . Then find a new step file to replace the corrupt one . 

Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.