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  3. Issue with impedance matching of differential pair

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Issue with impedance matching of differential pair

Sugreev
Sugreev over 4 years ago

Hi,

I am designing a PCB and having issue with the impedance matching of the differential pair. I am using the guidelines of the IC manufacture to design my PCB. Here is the link of:

https://www.ftdichip.com/Support/Documents/AppNotes/AN_146_USB_Hardware_Design_Guidelines_for_FTDI_ICs.pdf

According to this guidelines, the differential pair (DP and DM signals of the USB) must have 90 ohm impedance to each other. But I am not able to match this impedance. I tried using different line width (10mils,15mils,20mils,25mils,30mils) of the differential pair but it doesn’t help me. Also, I tried using 0 ohm resistor in between that didn’t help as well.

The specifications of my PCB are- the conductor thickness is 2oz(2.8mils) and the dielectric thickness is 63 mils (using FR-4 and dielectric constant is 4.5).

Can anyone please help me in resolving this issue ??

Thanks

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  • redwire
    redwire over 4 years ago

    The guidance is a bit misleading.  You don't *require* 45 ohm single ended.  You do need 90 ohm differential.  The 90 ohm diff pair can be achieved with a tightly coupled pair on the top.  You could do CPWG as suggested by excelon or you can widen slightly and do just an edge-coupled microstrip pair.  

    If you had a line which was 45 ohm single ended, and 90 ohm differential then that would suggest an uncoupled pair and those dimensions are not practical on a 2 layer board again as excelon has mentioned.


    What tools were you using to check your impedance?  The calculator in Allegro/Orcad will get you the right values assuming your stackup has been entered correctly.

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  • redwire
    redwire over 4 years ago

    The guidance is a bit misleading.  You don't *require* 45 ohm single ended.  You do need 90 ohm differential.  The 90 ohm diff pair can be achieved with a tightly coupled pair on the top.  You could do CPWG as suggested by excelon or you can widen slightly and do just an edge-coupled microstrip pair.  

    If you had a line which was 45 ohm single ended, and 90 ohm differential then that would suggest an uncoupled pair and those dimensions are not practical on a 2 layer board again as excelon has mentioned.


    What tools were you using to check your impedance?  The calculator in Allegro/Orcad will get you the right values assuming your stackup has been entered correctly.

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  • Sugreev
    Sugreev over 4 years ago in reply to redwire

    Okay!

    Yes,I am using the calculator in Allegro/Orcad. I ma using same values but still not able to resolve the issue.

    Thanks

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  • Wild
    Wild over 4 years ago in reply to Sugreev

    The Allegro PCB calculator, I have found does not do coplanar wave guide impedance.  I believe you would need the sigrity tool, or go to the Ansys modelers.

    Try this: https://chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htm

    We have used this and it has been very accurate, verified measurements on a TDR.
    Also the Saturn PCB toolkit comes up with similar results: saturnpcb.com/.../

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  • redwire
    redwire over 4 years ago in reply to Sugreev

    Can you take a screenshot?  Make sure you have the BOTTOM layer marked as "PLANE" otherwise the trace calculator won't work -- but this also means that the the bottom is really ground in your design on the bottom (under the USB traces).  Also, soldermask over trace will pull the impedance slightly.  You can adjust that later -- let's get your calculator working

    Cadence does not support the CPWG construction but it does support edge-coupled traces properly.  You really don't *need* CPWG for the USB application.  Lots of manufacturers out there are building 2 layer boards with USB that work great.

    Make sure your settings look like mine.  You should get the same values.

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  • Sugreev
    Sugreev over 4 years ago in reply to redwire

    I did the same but still having same problem.

    I have one question. when I have created diff pair set in Electrical Constraints, in that I have declared the impedance of diff pair 90 ohms with 15% tolerance. 

    Is that right thing to do ??

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  • excellon1
    excellon1 over 4 years ago in reply to redwire

    Sugreev. My design did not use the impedance calculator in the cadence tool but was done on a RF Simulator.

    So the first thing is you have to have manageable trace widths so as to route off the connector and to the IC you are using. I recalculated my initial design which had a trace width of 24 mils down to 13 mils so it would be easier to handle this. As Wild pointed out the impedance calculator in Allegro does not handle CPWG so don't worry about it.

    For a DIFF Impedance target of 90 Ohms there are various combinations of trace to space and side wall ground that can be used.

    On a pcb design most PCB tools use a "Global Impedance Calculation" Based on the stackup only. This has a huge caveat in a fair few regards.

    Anyway to get to where you need to be the first thing is you want to remove the constraint for the impedance from the Allegro Spreadsheet.

    Create a diff pair that has a trace width of 13 mils and a gap of 6 mils and route it in on the top layer.

    Next add the ground either side of that diff pair. The spacing to the diff pair is 6mils. Just like in the picture above.

    You can increase the spacing of the Ground Side wall to 10 mils. This will reduce the returnloss of the diff par a little but might make the design easier to manufacture.

    Here is a pic of the Net Rules for the diff pair.

    Before you add in the ground you want to set in the spreadsheet Your Line to Shape clearance and make it 6mils or 10 mils as explained above. This is done under the spacing > spacing constraint set - Shape to line setting.

    In your picture it looks like you are just going a very short distance so things are less critical from the perspective of line signaling. If the 13 mil trace for the diff pair is too wide to come off the pins then go with

    Trace width = 10 Mil
    Trace Space =  6Mil
    Trace to ground space = 6mil.

    Update your constraints to accommodate the design spacing etc.

    All the best.

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