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  3. No constraints applied/errors raised to routing through...

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No constraints applied/errors raised to routing through a hole on a pin with a non-plated mechanical hole and a copper pad only on one layer

AleksMK
AleksMK over 4 years ago

Hi all,

I've run into a pretty weird problem/feature(?). I've made a symbol for Wurth's 9774060360 steel spacer, and as per the datasheet, the symbol is comprised of one pad, with a non-plated mechanical hole padstack (I've chosen mechanical hole because I want it to be non-plated), and a circular copper pad only on the top layer. The summary of the padstack I've attached as as a PDF.

Now, the strange part. When I use this symbol in a PCB design, it would seem that there are no constraints applied, and no errors given when I try to route traces through (!!!) the symbol on layers where there are no pads defined. This would mean that I can route traces, pour shapes on an area that will afterwards get drilled out! Well, this gets my on my toes a bit. Attached is a picture of what I mean:

This is a 4-layer design, with the top layer in green, third layer in grey and bottom layer in yellow. I didn't show layer 2 because it only has a ground plane (which also goes through the hole!). As it can be seen, those two traces pass right through the hole on Layer 3 and the bottom layer! I've enabled the "Hole To" constraints in the Spacing constraints configuration window in Constraints Modes, but I'm still able to do this.

What's going on? I would have imagined that violations like these would raise all kinds of DRC errors, but it would seem that this is something that I can easily do. How would I also set constraints (mainly spacing) for holes like this?

I'm using OrCAD PCB Designed Professional 17.2 with Hotfix S076 installed.

3034.c740hn440m750zc0xc0mx450.pdf

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  • steve
    steve over 4 years ago

    Look at Setup - Constraint Modes - Spacing and Hole to. These are not enabled by default (since usually a pad to would pick these up first). You can also adjust the Spacing Object to Hole (Line to, Pin to, Via to etc).

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  • AleksMK
    AleksMK over 4 years ago in reply to steve

    Hi Steve,

    Thanks for your feedback! I already have the "Hole to" constraints mode enabled, and with Constraints Manager I have set a non-zero value for the Hole To spacing constraints. I can still perfectly route through the hole, without any DRC's or troubles. Am I missing something?

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  • steve
    steve over 4 years ago in reply to AleksMK

    So the issue is that you don't have Padstacks defined for the other layers and when you save the padstack you have defined you are warned that the drill depth will be reduced to match the layers you have pads defined for. Try specifying a small pad on default internal and end layer say 0.5mm then also define a keepout pad for these layers say 4.5mm then save the pad and reload.

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  • steve
    steve over 4 years ago in reply to AleksMK

    So the issue is that you don't have Padstacks defined for the other layers and when you save the padstack you have defined you are warned that the drill depth will be reduced to match the layers you have pads defined for. Try specifying a small pad on default internal and end layer say 0.5mm then also define a keepout pad for these layers say 4.5mm then save the pad and reload.

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  • AleksMK
    AleksMK over 4 years ago in reply to steve

    Hey Steve,

    That was it! I was not aware that the drill depth is directly connected to the pad definition per layer. The warning that the padstack editor gives is "No default internal pads are defined. When loaded into a design, no internal pads will be added for unmatched padstack layers or when additional internal connection layers are added to the design." which is pretty vague regarding the hole depth. Generating the drill file also confirmed that the hole is defined on one layer only, as it created a drill file for layer 1-1.

    I created a circular pad of 0.1mm size on the default inner layers and the bottom layer, and now the "Hole to" constraints are looked at. Drill file creating also confirms that the hole is defined through the stackup (1-4).

    Thanks for pointing that out to me! Cheers.

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