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Same net spacing DRC error handling

ichliebedich over 4 years ago

Hi all

I set the 0.2mm of SMD pin to BB via at the samce Net spacing rule

and I tested like below. each couple of left one is SMD pin and right one is BBvia

I set the 0.2mm spacing. so left column set occurring DRC error is correct.

but when the SMD pin is coverd by BBvia over half, DRC error was not occur as you can see the right column set

but if BBvia take apart from center of the SMD pin, the DRC error occurred again, before then DRC error was not happened..

How can I handle the that DRC error marker without waive DRC?

I don't want to occur DRC marker when SMD pin and BBvia are contacted even slightly

but if they are apart, same net spacing Rule must be effected.

(pin and via are located same layer)

reagard

steve over 4 years ago

This is a via in pad rule which is enabled differently. Take a look at Via in Pad Rules (parallel-systems.co.uk)
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ichliebedich over 4 years ago in reply to steve

thank you! I checked that document but this case is not work.. because this design should set the "same Net Spacing" rule as well.. if center of via take off from smd pin boundary, the same net spacing rule was applied automatically. doesn't any way to ignore the DRC when pin and via are touched each other?
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