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  3. Internal unused via pad suppression on power layers not...

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Internal unused via pad suppression on power layers not working

WelshMart
WelshMart over 3 years ago

I am using 17.4 S020. I cannot get the dynamic unused pads suppression to work on my power layers, pad suppression is setup and works on my signal layers.

My power layers are defined as planes in my stackup.

I have the "Unused Pin Suppression" and "Unused Via suppression" enabled on all signal and power layers in Cross-section Editor.

My via has "Suppress unconnected internal pads" enabled in Padstack Editor.

I have watched the video https://www.youtube.com/watch?v=0-bxKfwb0Qc&t=61s which shows how to setup pad suppression, the example uses both planes and conductor layers.

In the video example, it shows that planes and conductors can be setup for pad suppression. But then it only shows the result on a signal layer, not on a power layer.

I have followed how to setup pad suppression and it works on my all my signal layers but does not work on any of my power layers.

Any ideas? 

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  • steve
    0 steve over 3 years ago

    Make sure you power plane layers are not set to be negative artworks (in Cross Section Editor) You can also check that dynamic unused pad supression is enabled in the cross section editor (unused pad suppression tab) but also get up to date. I've just tried this and it's working for me but I'm using 17.4-2019 S026. 

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  • WelshMart
    0 WelshMart over 3 years ago in reply to steve

    Thanks for your help Steve,

    I had planes set as negative artworks

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  • AvengerThanos
    0 AvengerThanos over 3 years ago in reply to steve

    steve can you elaborate more on the difference between negative and positive planes. I see a lot of documents on the internet but none are clear for understanding.

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  • steve
    0 steve over 3 years ago in reply to AvengerThanos

    Positive dynamic shapes (WYSIWYG) have been the recommended way to use copper pours for quite a while now. Back in the day negative artworks where processed by the ECAD Engineer so for negative planes, you would draw the thermal relief connects and the clearance to pins / vias then the fabrication engineer would generate a mirror of this to produce the actual copper layer. The screen redraw time to process a plane used to make the size of the board / artwork too large. Nowadays that isn't really an issue anymore.  There are lots of articles online about this subject. 

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