Build Stacked Dies with Allegro Package Designer+

The vertical stacking of the dies on top of a package substrate is called die stacking. Stacking increases efficiency and helps reduce the package size. It allows the system to be partitioned into RF/Analog/Digital blocks, each using optimal technology for fabrication. There are shorter interconnects between the dies in the stack. The development cost is low, and it takes shorter time to market.

A die stack consists of the die components stacked vertically, along with the spacers and interposers. The spacer provides separation between the active components of the stack. They are blocks of adhesive materials. Interposers also provide separation like the spacer, but they also consist of design elements like vias, routed clines, and bondfingers to connect between components in the stack or on the substrate.

A die stack can have flipchip or wirebonded dies, or a combination of both. The simplest die stack can have only one die mounted to the package substrate. More complex die stacks have multiple dies stacked on top of each other along with spacers and silicon interposers.

Cadence Allegro Package Designer Plus and SiP IC package design tools provide the user with the Die Stack Editor utility. Users can visualize the die stacks and can edit vertical dimensions, spacer and interposer material data, and flipchip bump dimensional data. It also allows to set the stack placement for cavity support.

Team PCBTech

Cadence Design Systems