Reuse Module with different stackup

I don't know if there is a direct way to do this in Allegro, I'll look into though. There are some non-direct methods to do this which might get you close to what you want.

1. You could use a combination of placement files and sub drawings to import your 6-layer board. Where things might get weird is with the vias, depending on what technology you are using.

2. You could change the number of layers in your 6 layer design to match that of the 10-18 layer design. Just don't use the the extra layers. You might be able to get the reuse modules to work this way.

CircuitSpace plugin handles stackup changes, rotation and side mirroring without any problems.  Does your site have a license for that?

Just make sure you are running the latest version of 17.2-2016 S081 or 17.4-2019 S027. Both have that capability to choose which layers you want to match when you bring the module file in. How to Use Mapping and Object Support Feature in Place Replicate (cadence.com)

Thanks, but i don't seem to have a license for it.

Thanks everyone so far.  Arguably a little progress, but not exactly what i was hoping for yet.

Ideally i would like to be using the REUSE method (Allegro Design Entry HDL Reuse Tutorial) of placing the module instead of "place replicate" method (How to Use Mapping and Object Support Feature in Place Replicate).

Here's a summary of where i'm at with the two methods ...

"place replicate" method ...

When i first tried (using windows), Allegro PCB Designer went non responsive for several minutes.  So i shut it down to try again.   Again it went non-responsive, but i didn't close it so quickly.    After forgetting about it and coming back to it 15 minutes later, Allegro was responding and the layer mapping screen was there.  So maybe it kind of works.  Running from linux has the same issue.  Anybody know a way to debug this?  Why could it be soooo slow?   Also noticed it only seems to be slow on the first time i try to "place replicate apply".  Subsequent times within the same open Allegro PCB Design session are quick as expected.

I also noticed a new .mdd file appear in the parent brd file directory when it does work (renamed with a suffix of "_mapped#" at the end).   So it appears to make a local copy of the .mdd in which the stack-up is changed to match the parent board file and layers are swapped.   This seems like it wont be able to simply update the module  in the future (which is largely the point of the REUSE method)

The other major issue is after the stack-up/layer mapping, you need to map the refdes.   During the packaging step, the module instance refdes all get updated with a unique suffix added (makes sense since you can have multiple sub-design instances and must have a way to uniquely identify the refdes of different instances).  In my case i only ever use one instance, but regardless the refdes after packaging no longer match the refedes in the .mdd.   As a result Allegro wants me to match every one of the 500+ refdes in the module.  This is painful.

REUSE method ...

This just seems like the right way to do it because you can Place->Manually and choose the "Module instances" and drop everything down at once, but It doesn't seem to support layer mapping.  With "place replicate apply" method, i have to place all the individual components first, then select them, then "place replicate apply", then choose the .mdd file, then map the stack-up, then map the refdes (see below).  This is not the best way to do it when other teams are trying to pickup your module (Although seems it may become the only option).   Ideally i can have a dedicated design cell with a schematic and associated .mdd in it's own directory.   Then i can have others place it directly into the parent board file as a Module Instance and update later.

the REUSE method seems to work with different layer count, so long as the layer names are identical.   It will map the matching layer names, maybe not always reasonable with too many different design pickup up one module.

FYI, i also found this When placing module instances, I got the error "(SPMHDB-277): Physical Layers do not match" support item which is exactly my problem.   However the solution is to change the stack-up of the module to match the parent board file.  This doesn't work when i need to use the module in different designs with different stack-ups.

Option 1 from I can't place or refresh a module because the cross-sections of the module and board do not match  seems to be the best answer so far.