Comparing schematic netlist to pcb database

From the user interface I use the new utility "Update layout" and "Update Schematic" to compare the Schematic netlist with the board and vice versa. Before we do any changes and click on update, we are able to see the differences between schematic and layout. It shows all the differences which might occur in design cycle (like connectivity differences, refdes changes, constraints etc. between schematic and board). Here is some more information on it:-

(+) Syncing schematic and layout has never been easier! - Capture CIS - PCB Design - Cadence Community

Usually I do this at the end of any project

from schematic I create a new pcb and I save XML file from Tool-->More-->Design Compare

then I open the final layout and I open the previous XML in Design Compare

This procedure reports net and part differences and also produce a repor file if all is sync (I attach this file to the final documentation)

Regards

Stefano

The latest feature of the update layout/ update schematic makes sure you have both netlists in sync. I would say it is almost impossible to have any mismatch when this feature is used.