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Allegro – Tip of the week: Checking for Max stacked via count

PCBTech

This check requires the Venture or Enterprise product where advanced DFx checks are available.

This rule defines the maximum number of micro vias or blind/buried vias, which can be stacked together vertically. To use this rule in your design, do the following:

Go to Manufacturing > Design for Fabrication. Select the Holes category, create a new CSet and add the Max stacked via count value to the CSet. As with other CM domains, apply this CSet to the Design section.

Following image shows the application of the CSet:

Team PCBTech

Cadence Design Systems

  • JPN001

    Thanks for the tip.  How do you set the distance constraint from via to via?

  • mahimag
    in reply to JPN001

    try spacing worksheet in Constraint manager, you have thru via to thru via spacing constraint

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