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  3. Updating an Allegro Layout using "Update Layout" or "Import...

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Updating an Allegro Layout using "Update Layout" or "Import Logic" from Allegro Issue

cstocci52
cstocci52 over 2 years ago

Folks,

I made a change to my schematic and redid the netlist into the allegro subfolder as always.  No issues.  However, when I did the "Update Layout" from within Allegro, things worked OK except all of the VIAs that connected my changed nodes from one DC voltage to another still retained their old net assignment.  All of the IC pins and routes are correct by seeing the netnames on the existing routes, but their connections to the original VIAS which are to the old netname are still connected and did not "rip up" as I requested during the update.  Weird!  Therefore, I see a +3VDC VIA netname (old netname) still connected to the updated +5VDC netname through a VIA ()which is a short!!) which originally connected those IC pins to the old +3VDC.  I get around this by deleting all of the old VIAs that made that connection to the +3VDC plane, then redo the VIA on the net to the +5VDC plane just below the +3VDC plane.

I thought that Allegro would automatically reconnect the updated nets using the existing VIAs to the updated power plane directly below the old power plane.  Was I wrong on this assumption?  Is there something special about VIAs that one needs to do this "update" manually with just the VIAs?

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  • steve
    0 steve over 2 years ago

    Before you import the updated netlist check Constraint Manager - Properties - Net Properties - General and look for a property called retain net of vias. It sounds like it is enabled and in this case you don't want it set.

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  • cstocci52
    0 cstocci52 over 2 years ago in reply to steve

    Hi Steve,

    I checked that earlier and nothing there was set.

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