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  3. Test point creation workflow recommendations?

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Test point creation workflow recommendations?

JS202408156358
JS202408156358 10 months ago

I am trying to figure out the most efficient workflow for adding test points. My use case involves adding ~100 or so SMT pads at the bottom for bed-of-nails ICT test that are required to be on a test point grid. A lot of the nets are on the top or from inner layers and so have to be brought to the bottom using stubs. I'm used to Xpediiton workflow of being able to set a test point padstack, set a test point grid, and then select a net, add the test point to the bottom layer on the grid with that net attached and then route the stub with gridless routing.

In Orcad, it seems I need to route the stub, switch layer pairs to be both bottom once I bring the stub to the bottom and then change the grid to be the test point grid and then add the test point on the grid. It requires a lot of clicks, very mistake prone requiring lots of oops and very slow for 100+ test points to be brought out at the bottom. 

I'm sure there is a better way that is used by folks with a lot of Orcad experience. Any suggestions?

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  • techiecs
    +1 techiecs 10 months ago

    -You can either directly define test points on nets in the schematic or identify the nets on
    which test points are to be added in Allegro PCB Editor.

    -You can place a single-pin component on the net in the schematic design on which the test point is to be defined. This single-pin component can itself be treated as a test point in Allegro PCB Editor.
    The footprint of the component placed on the net can work as a test point.
    You can refer the below information available on Cadence learning and Support Portal for going through the flow if it-
    support.cadence.com/.../ArticleAttachmentPortal

    If you want to create Testpoints Automatically from within the Allegro PCB Editor, then you can go to Manufacture>Testprep>Automatic menu for generating testpoints.
    Below link from Cadence learning and Support Portal explains this in detail-
    support.cadence.com/.../ArticleAttachmentPortal

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  • JS202408156358
    0 JS202408156358 10 months ago in reply to techiecs

    I have been able to emulate a workflow very close to what I've been used to. I created two scripts

    bottom_testpoint.scr:

    scriptmode +invisible
    setwindow pcb
    define grid
    setwindow form.grid
    FORM grid bottom subclass_x_grids 0.635
    FORM grid bottom subclass_y_grids 0.635
    FORM grid done
    setwindow form.mini
    FORM mini active_subclass BOTTOM
    FORM mini alt_subclass BOTTOM
    FORM mini gridless YES
    FORM mini bubble_space 'Hug preferred'
    FORM mini shove_vias Off
    setwindow pcb

    and route_top.scr:

    scriptmode +invisible
    setwindow pcb
    generaledit
    add connect
    setwindow form.mini
    FORM mini active_subclass TOP
    FORM mini alt_subclass BOTTOM
    FORM mini gridless YES
    FORM mini bubble_space 'Hug preferred'
    FORM mini shove_vias Off
    setwindow pcb

    I've created "btp" and "rtp" aliases to route the bottom and the top respectively by replaying these scripts. I type rtp to start routing from a cline segment, punch a via to the bottom using space alias, type btp to allow me to set the grid and subclasses to allow me to put in a via with pad on the bottom. Works great and don't miss Xpedition for this task any longer.

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  • JS202408156358
    0 JS202408156358 10 months ago in reply to techiecs

    I have been able to emulate a workflow very close to what I've been used to. I created two scripts

    bottom_testpoint.scr:

    scriptmode +invisible
    setwindow pcb
    define grid
    setwindow form.grid
    FORM grid bottom subclass_x_grids 0.635
    FORM grid bottom subclass_y_grids 0.635
    FORM grid done
    setwindow form.mini
    FORM mini active_subclass BOTTOM
    FORM mini alt_subclass BOTTOM
    FORM mini gridless YES
    FORM mini bubble_space 'Hug preferred'
    FORM mini shove_vias Off
    setwindow pcb

    and route_top.scr:

    scriptmode +invisible
    setwindow pcb
    generaledit
    add connect
    setwindow form.mini
    FORM mini active_subclass TOP
    FORM mini alt_subclass BOTTOM
    FORM mini gridless YES
    FORM mini bubble_space 'Hug preferred'
    FORM mini shove_vias Off
    setwindow pcb

    I've created "btp" and "rtp" aliases to route the bottom and the top respectively by replaying these scripts. I type rtp to start routing from a cline segment, punch a via to the bottom using space alias, type btp to allow me to set the grid and subclasses to allow me to put in a via with pad on the bottom. Works great and don't miss Xpedition for this task any longer.

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