CAF Resistance and SIR Testing: Preventing Hidden PCB Failures Through Smarter Design & Process Control

What is CAF? 

CAF stands for Conductive Anodic Filament. It refers to the electrochemical process where metal ions—most commonly copper—migrate along glass fibers within a PCB’s dielectric material. This ion migration can form unwanted conductive filaments that reduce insulation resistance between conductive paths. Over time, this can result in intermittent errors, permanent shorts, or complete failure of the electronic assembly. 

Ensuring Long-Term PCB Reliability: Understanding and Preventing CAF Failures 

As electronic products become increasingly compact and complex, the reliability of internal PCB insulation has never been more critical. Environmental stressors—such as temperature fluctuations and high humidity—do not only affect the surface of a PCB. Over time, conductive paths can form inside the PCB between conductor structures at different potentials, reading to insulation breakdown, short circuits, or complete product failure. 

To safeguard product performance over its intended lifecycle, it is essential to evaluate not only surface insulation resistance (SIR), but also the volume insulation resistance. One of the most important tools for this assessment is the CAF test. 

How CAF Failures Develop 

CAF-related failures differ significantly from surface-based failures: 

• They tend to progress more slowly and internally, often undetected until critical.
• They are heavily influenced by base material properties, stack-up design, and manufacturing process control, rather than simply poor handling or contamination.

As miniaturization trends continue—resulting in tighter conductor spacing and thinner dielectrics—CAF risk increases significantly, making CAF testing and prevention strategies essential. 

The CAF Test: How It Works 

To assess a PCB's resistance to internal insulation degradation, CAF testing is performed using test coupons with defined geometries. These samples are placed in a climate chamber and connected to an external resistance monitoring system. Resistance and leakage current are measured at regular intervals between features such as plated through-holes (PTH) and internal traces. 

Typical Test Conditions: 

• Pre-conditioning: 3x lead-free reflow simulation.
• Temperature: 85 °C
• Relative Humidity: 85%
• Bias Voltage: 100–1,000 V
• Test Duration: 1,000–3,000 hours.

Failure Criteria: 

• Insulation resistance drops below 10 MΩ.
• Resistance drops by more than 0.3% from its initial value.
• Leakage current exceeds defined thresholds.

Test results are statistically analysed using Weibull distributions, providing insight into expected product lifespan and failure probability. 

Preventing CAF Failures: Best Practices 

CAF resistance can be significantly improved by controlling material selection and process design. Key prevention strategies include: 

Selecting CAF-resistant base materials 

• Using layer stack-ups optimized for Z-axis expansion to prevent resin cracking and delamination.
• Ensuring sufficient conductor spacing in layout
• Reducing registration offset, which shortens insulation paths.
• Avoiding process residues such as conductive particles that can bridge spacing.
• Maintaining clean handling procedures
• Ensuring high cleaning quality between all manufacturing steps

These factors must be carefully managed from the design stage through to final production. 

Why Standard Sourcing Strategies Can Lead to Failures 

Many OEMs (Original Equipment Manufacturers) rely on EMS (Electronics Manufacturing  Services) providers to handle complete product builds—including PCB sourcing—as a cost-saving  strategy. While this reduces transactional overhead for the OEM, it introduces substantial risks when it comes to material control and process integrity. 

EMS providers are often incentivized to reduce costs. As a result, they may: 

• Accept material substitutions that lack CAF resistance.
• Switch to alternate PCB factories with differing lamination or drilling parameters
• Overlook minor process changes that impact long-term reliability.

These changes may not be visible to the OEM or detectable during final assembly testing, yet they can dramatically increase the risk of CAF-related failures over time. 

Azitech’s Solution: Transparency, Control, and Reliability 

At Azitech, we go beyond standard sourcing or quality checks. We offer a comprehensive and intelligent approach to PCB sourcing and production through our PCB Compliance framework—a system built to ensure reliability, traceability, and process control at every stage. 

Intelligent PCB Compliance Matching 

Azitech’s PCB Compliance is an advanced quality assurance and qualification system that safeguards the reliability of every PCB part number. The system is designed to match the unique requirements of each PCB with the right manufacturing process, factory capability, and materials—while incorporating more than 50 technical and compliance parameters per part number. 

This includes: 

• CAF resistance as a critical evaluation metric
• Material qualification down to resin systems and glass types
• Stack-up validation and Z-axis expansion performance.
• Via structure and drilling technique alignment
• Environmental durability, including thermal stress and humidity.
• Factory audit data and historical yield rates
• Traceability systems and documentation review

This intelligent matching ensures that each PCB is produced under the most reliable conditions for its intended application, using fully qualified suppliers and proven manufacturing setups. 

Process Control and Supplier Management 

Beyond design and material matching, Azitech’s PCB TEAM maintains rigorous control over the entire manufacturing process by: 

• Validating and monitoring hot press parameters, drilling techniques, and cleaning processes
• Preventing unauthorized material substitutions or supplier changes
• Ensuring all production data, stack-ups, and specifications are version-controlled and traceable.
• Auditing factory performance to enforce consistency and conformance to specifications.

Security of Intellectual Property 

Azitech’s PCB Compliance approach also ensures the highest level of IP protection. Secure data handling, controlled supplier access, and end-to-end documentation protocols are built into the process. This is particularly important for OEMs working on sensitive technologies or high-value applications where design confidentiality is non-negotiable. 

This expanded section now highlights both technical process assurance and strategic sourcing protection, reinforcing Azitech’s role as a high-reliability PCB partner. Would you like me to now integrate this into the full article text from earlier, so you have one final document? 

Conclusion  

CAF testing and prevention is not optional in modern electronics—it is a critical part of long-term reliability engineering. As component spacing tightens and products are expected to survive in harsher environments, proper control of materials, stack-ups, and supplier processes is essential.  

Azitech provides the expertise, supply chain control, and quality assurance necessary to protect your products from internal insulation degradation and ensure lifecycle reliability—even when standard industry sourcing practices may fall short.  

Learn More  

To gain further insights into CAF testing procedures or how to embed CAF-resistant design into your product development, contact the Azitech PCB Team—your trusted partner in high-reliability PCB production. 

SURFACE INSULATION RESISTANCE  

High humidity, temperature fluctuations or even a combination of both: PCBs are often exposed to unfavourable environmental conditions that have a negative impact on the reliability of electronic assemblies. A suitable method for evaluating the resistance of components under such adverse conditions is the SIR test according to IPC. This enables the surface resistance (Surface Insulation Resistance) in a humid-heat climate to draw conclusions about the technical cleanliness and structural condition of the PCB surface. 

Moisture in particular can cause migration paths to form more quickly on printed circuit boards. The result: a short circuit. This can be recognized, for example, by the formation of so-called dendrites (see Fig. 1). Corrosion processes on the one hand and the migration of conductive impurities on the surface on the other are responsible for this. This is where the SIR test comes into play, as it is ideal for checking placement processes and flux residues and evaluating the long-term effects of surface contamination. 

Carrying out an SIR test  

The SIR test according to IPC is one of the accelerated service life tests alongside the CAF test. This means that failure processes are accelerated in order to obtain information on the qualification of electronic assemblies under demanding climatic conditions at an early stage. For example, the SIR test is carried out at elevated temperatures and high humidity levels with bias voltages on specially designed PCB test circuits in order to induce electrochemical migration until failure. This is followed by a detailed data evaluation and analysis of the failed parts. If a failure is detected, this is followed by a visual evaluation. The first step is to correlate the data with the existing test structure in order to localize the failure on the test circuit board. The second step involves a visual inspection using light microscopy or SEM/EDX analysis to identify dendrites or impurities. The SIR test is most frequently carried out as a 21-day test (504 h) with a lower resistance limit of 500 MOhm as the failure criterion. The test parts typically have a test layout with comb structures and defined distances. As the opposing conductor runs are at opposite potentials, a defined electric field is created in which a directed migration of positively or negatively charged ions takes place. This diffusion in turn leads to the formation of a conductive path and ultimately to a short circuit.  

Typical test conditions of an SIR test: 

Temperature: 40 °C  

Relative humidity 92 %  

Bias voltage: 10-100V  

Test duration: 96-504 h  

Check unpopulated printed circuit boards. 

Unassembled PCBs have a carrier and wiring function. The cleanliness level of an unpopulated PCB is therefore decisive for the cleanliness of the assembly. Reliability testing on an unassembled PCB allows statistically verified failure rate parameters to be determined experimentally and incorporated into calculation models for the reliability of assemblies. In addition, SIR tests enable a production-related evaluation of the cleanliness level as well as a separation of contamination causes from PCB production and further processing.  

Avoid short circuits.  

The causes of short circuits in the SIR test according to IPC can be manifold. In order to achieve good resistance to failure due to surface effects, the following main influencing factors should be carefully controlled:  

• Process residues in the form of conductive impurities.
• Layout offset that leads to shorter insulation distances.
• Process residues in the form of particles that shorten distances.
• Handling (finger perspiration)
• Water quality during final cleaning Cavities on the surface (e.g. release areas) in which residues can collect.

Have you ever encountered unexpected reliability issues in your PCBs due to CAF (Conductive Anodic Filament) or SIR (Surface Insulation Resistance) failures?

What strategies have you applied in material selection, stack-up design, or process control to prevent these hidden failure mechanisms?