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  3. Differential Pair Setup of Class to Class

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Differential Pair Setup of Class to Class

Sagetech
Sagetech 9 days ago

Trying to configure differential pair spacing from pair to pair and other traces.

I've been following the Parallel Systems Differential Pair tutorial but I'm not getting the results I need. 

I have my diff pair trace width and spacing set up in the physical cset.

I set up a spacing cset and net class to get my pair to pair spacing constrained. When I do this, the pairs do seem to adhere to the pair to pair spacing constraint but I get a DRC on the differential pair line to line spacing set in the physical constraint. If I remove the spacing cset, the pair spacing DRC goes away but the pair to pair spacing is no longer constrained and I can route one pair too close to the next pair.

Been through the instructions a dozen times with the same result. Instructions were published in 2020, maybe things have changed since then?

Thoughts / suggestions?

Tom

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  • Sagetech
    0 Sagetech 9 days ago

    PS: Running latest version of PCB Editor 24.1

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  • steve
    0 steve 4 days ago in reply to Sagetech

    It sounds like you haven't set the min line spacing andf tolerance for the physical CSet for the diff pair. (It does explain this in the note you mention). Example, if the primary gap is 0.2mm, set the tolerance + and - to 0.05 then the min line spacing to 0.2 - 0.05 (so 0.15) and see if that helps. Tolerance and min line spacing is highly recommended when defining diff pairs. There is a supplementary notes on diff pairs on the same website that exaplins why.

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  • Sagetech
    0 Sagetech 4 days ago in reply to steve

    I did not set the tolerance (as you surmised) just the trace width and primary gap. I thought with the tolerance set to zero it would use the width / gap number I set as hard and fast numbers, no tolerance allowed.

    Tom

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  • steve
    0 steve 4 days ago in reply to Sagetech

    You need to read the supplemental notes app (under the diff pairs one) on the same website and that gives you all you need to know about why you really should set tolerances and min line spacing.

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  • excellon1
    0 excellon1 3 days ago in reply to steve

    Hi Steve, Nice app-note, works very well here - cool beans ! Thanks.

    Tom on the spacing rule it is fairly ez to setup, steps below. Couple of thoughts first. On a board there are global spacing rules for everything but sometimes it is handy to be able to over-ride these rules by creating a dedicated spacing rule and applying it to an object. In the case of diff-pairs. A dedicated spacing rule pertains to objects outside the diff-pairs. It does not have anything to do with the actual diff-pair creation or spacing gap of the diff pairs etc.

    Assuming you have your DIFF-Pairs working here is how.

    IN The CM Left-Pane "Spacing Tab" go to "Spacing Constraint Set" (All Layers). In the right pane under  "Objects" Create a new Spacing Set. I used DP-Keepout as the name. Change a couple of things in there such as Line to line spacing & maybe shape to line spacing
    so when you test it out it will be ez to see the results. I used 50Mil so it would be obvious on the board.

    Next in the left pane click on Net (All Layers). In the right pane you should see your Diff-Pair Objects. In here all you need to do is apply the spacing rule you just created "DP-Keepout" to the DP objects. Click in the cell "Referenced Spacing Cset" and choose the rule
    "DP-Keepout"

    That's it. As I alluded to above you now have a dedicated rule that is attached to the DP Objects. With this rule if you try to route a trace close to your DP's you will see that it wont come closer than what the rule was setup to do. If you rip up your DP's and re-route them they should route fine again, but because of that new spacing rule you may find you have to clear more objects. It may be easier to just route in the DP's first using the global spacing and then apply the rule to keep any other objects away as you complete the board.

    Hopefully that's the EZ button !

    Best Regards.

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  • Sagetech
    0 Sagetech 3 days ago in reply to excellon1

    Yes this does work, the diff pair to “other” spacing is now maintained – thank you.  

    But……..

     When I set the “line to pin” clearance so that I can’t route within 18 mils of a pin (connector, IC, etc…), I get DRC’s at the connector where the traces connect which makes sense as they no longer conform to the constraint due to the picth of the connector pins. Is there a way to “allow” this?

     I suppose at the end of the day I can waive those DRC’s. Biggest hurdle for me was getting the trace routing to conform.

     Tom

    Was trying to insert a screen shot of the DRC's but keep getting errors. 84k file shouldn't be an issue.

    Pic just showed three diff pairs connecting to the connector and the DRC's of pin to line at each connection point. 

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  • Sagetech
    0 Sagetech 3 days ago in reply to Sagetech

    Oh, and next up I need to constrain groups of diff pairs to be routed to the same length  +/- tolerance. I believe I can do that by making a net group for each group of signals and apply the phase tolerance to that group.

    Tom

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  • Sagetech
    0 Sagetech 3 days ago in reply to Sagetech

    Oh, and next up I need to constrain groups of diff pairs to be routed to the same length  +/- tolerance. I believe I can do that by making a net group for each group of signals and apply the phase tolerance to that group.

    Tom

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  • JCTEYSSIER0
    0 JCTEYSSIER0 3 days ago in reply to Sagetech

    This is done with relative propagation delay constraint in electrical domain

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