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Differential Pair Setup of Class to Class

Sagetech

Trying to configure differential pair spacing from pair to pair and other traces.

I've been following the Parallel Systems Differential Pair tutorial but I'm not getting the results I need. 

I have my diff pair trace width and spacing set up in the physical cset.

I set up a spacing cset and net class to get my pair to pair spacing constrained. When I do this, the pairs do seem to adhere to the pair to pair spacing constraint but I get a DRC on the differential pair line to line spacing set in the physical constraint. If I remove the spacing cset, the pair spacing DRC goes away but the pair to pair spacing is no longer constrained and I can route one pair too close to the next pair.

Been through the instructions a dozen times with the same result. Instructions were published in 2020, maybe things have changed since then?

Thoughts / suggestions?

Tom

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  • Sagetech
    0

    Thank you all for the very helpful suggestions. Your tips along with some support from EMA/EDA has me headed in the right direction.

    We typically don't do many designs with diff pairs, mostly low speed digital, higher current power and RF. For past designs that have had a couple diff pairs, I set up some basic design rules and then adjust my routing grid to get the spacing I needed between them - again, simple design with two diff pairs and easy to control this way.

    The recent design I'm dioing requires multiple diff pairs on a fairly dense board so I figured this would be a good time to apply the tools available to keep the routing in check. I didn't think it would turn into such a learning curve but I believe I've got a handle on things now. I'm still a little unsure about the interaction / hiearchy of all of the "csets" but that'll come with use.

    Regards, 

    Tom

  • excellon1
    0 in reply to Sagetech

    Hi Tom

    That's good you are headed in the right direction. I'm sure your design will work out fine. On the Diff Pairs, there is some depth to getting these setup.
    When time permits, maybe work through some of the examples that was in that PS Design Note. There is much good stuff in there.

    Putting all the gobbly gook aside for a moment. One thing to be aware of is what is driving the numbers. It is the "Stackup". It would be valuable to know how your MFR will build that board in-advance so your math comes out close to expectations. If the stackup is wildly off within the tool then results for the board wont be optimal in particular if dealing with any type of impedance control. "Chicken-Egg" type of situation here.

    Chime back in if you have any additional questions.

    Best Regards.

Reply
  • excellon1
    0 in reply to Sagetech

    Hi Tom

    That's good you are headed in the right direction. I'm sure your design will work out fine. On the Diff Pairs, there is some depth to getting these setup.
    When time permits, maybe work through some of the examples that was in that PS Design Note. There is much good stuff in there.

    Putting all the gobbly gook aside for a moment. One thing to be aware of is what is driving the numbers. It is the "Stackup". It would be valuable to know how your MFR will build that board in-advance so your math comes out close to expectations. If the stackup is wildly off within the tool then results for the board wont be optimal in particular if dealing with any type of impedance control. "Chicken-Egg" type of situation here.

    Chime back in if you have any additional questions.

    Best Regards.

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