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Is there any way to not connect pads to a shape if it will cause DRCs?

BL202501134740

I had a request to gnd flood internal layers after routing was complete, but it created some issues I haven't fully been able to solve. The main one is that unused pads are suppressed during the design, but then when the gnd is poured suddenly there are a lot of pads that didn't used to be on that layer that now interfere with traces. Is there any way to easily fix this at this point in the design? I know I could do voids around problem pads but there are over 100 on my relatively small test board so it doesn't seem like a good use of time. Not suppressing the pads earlier in the design isn't an option because I need that space for routing. I played around with clearance values but some of the gnd pins are 60 mils and putting a clearance large enough to prevent those from connecting to the shape is excessive and cuts off unrelated shapes that happen to be near a gnd thru hole. Any insights are appreciated. The gnd flood is a manufacturer suggestion not design critical so I'm not too worried about it if there isn't a good resolution but I want to do my due diligence. 

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  • excellon1
    0

    HI

    On the unused suppression, are you suppressing both vias & pins ?.

    For the dynamic copper pour on the internal layers try direct connect for vias & pins "No Thermal Relief"

    Check in the constraint manager the "Hole To  Spacing Settings for , Line, Pins, Vias, Shape, Hole,  so there is enough clearance" Verify that DRC mode is enabled.
    On those settings.

    10 Mil can be a good starting point for clearance, when using suppressed pads.

    It sounds like your Hole to  DRC setting may not be right. If both pads and vias are suppressed and there is no connection to them all you should see is the
    drill hole even after pouring a dynamic plane.After pouring the copper update the DRC so the board refreshes.

    Best Regards.

Reply
  • excellon1
    0

    HI

    On the unused suppression, are you suppressing both vias & pins ?.

    For the dynamic copper pour on the internal layers try direct connect for vias & pins "No Thermal Relief"

    Check in the constraint manager the "Hole To  Spacing Settings for , Line, Pins, Vias, Shape, Hole,  so there is enough clearance" Verify that DRC mode is enabled.
    On those settings.

    10 Mil can be a good starting point for clearance, when using suppressed pads.

    It sounds like your Hole to  DRC setting may not be right. If both pads and vias are suppressed and there is no connection to them all you should see is the
    drill hole even after pouring a dynamic plane.After pouring the copper update the DRC so the board refreshes.

    Best Regards.

Children
  • BL202501134740
    0 in reply to excellon1

    Both pins and vias are suppressed. 

    I need the thermal relief on most of the pins so I'm not turning that off globally. 

    The hole to DRC in general is fine. My issue is that when I routed the traces there was no connection to the pads but after pouring gnd now the pads are connected. It was like this before pouring gnd

  • excellon1
    0 in reply to BL202501134740

    I see what you mean.

    So on this you could set properties on the pin or via so no thermal will connect to the dynamic ground.

    RMB click  on the object and choose "Edit Property" , Use Dyn_Thermal_Con_Type and assign a value of "None" on the layer where the thermal connects.

    To maybe save some time, you could also selectively draw smaller copper pours & merge them later on, avoiding areas such as in your picture.

    Best Regards.

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