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  3. connecting multiple signals to component

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connecting multiple signals to component

mikeyam
mikeyam over 3 years ago

Hello

I need to connect multiple signals for DDR memory to FPGA component.

I have list of signals in Excel with required FPGA pins it should be connected to. 

All the memory signal go to the same part of the FPGA component.

Its more than 100 signals and i have to do it for 4 banks, so its a lot of connectivity if done manually.

Is there any way to create such connectivity more automatically?

example, if we could generate some verilog like file from excel saying which signal name goes to which pin name.

Is there anything like this existing in Orcad?

Thank you in advance,

Michael

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Top Replies

  • CadAP
    CadAP over 3 years ago +2 suggested
    # Tcl script to read the csv file to add wire and netalias to a selected component. #I have created a tcl script which read the csv file and add netalias to the respective pin number from the csv file…
  • rg13
    rg13 over 3 years ago +1
    Hi @Mikeyam, Directly using Capture's GUI, there is no automated way to connect thousands of signals from memory to FPGA. If already net connectivity is present for these connection and you want to change…
  • avant
    avant over 3 years ago +1
    Maybe you can generate and then import a flat netlist from a spreadsheet.. Here's the general format: $PACKAGES CAP0201 ! 'CAP,4.7UF' ! '4.7UF' ; C29 $NETS CLK_N ; J2.1 U1.3 $END 'CAP,4…
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  • rg13
    0 rg13 over 3 years ago

    Hi @Mikeyam, Directly using Capture's GUI, there is no automated way to connect thousands of signals from memory to FPGA. If already net connectivity is present for these connection and you want to change signal names, then you can use Import/export properties for nets.

    However, I am looking for feasibility if it is possible through TCL or not. If it is possible, will try to create sample custom script and will share it with you separately. It may take some time.

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  • rg13
    0 rg13 over 3 years ago

    Hi @Mikeyam, Directly using Capture's GUI, there is no automated way to connect thousands of signals from memory to FPGA. If already net connectivity is present for these connection and you want to change signal names, then you can use Import/export properties for nets.

    However, I am looking for feasibility if it is possible through TCL or not. If it is possible, will try to create sample custom script and will share it with you separately. It may take some time.

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