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Problem with ORCAD Capture 16

scdr

Version of ORCAD is 16.

I try to realize example from Tools\Capture\Tutorial\CAPTUTOR.EXE. "Processing Your Design" . Project name is DCLOCK.obj

When I run Tools/Board Simulation This message appear.

**********************************************************************************************************************

Error: Failed to invoke "ncvhdl -cdslib C:\Orcad Projects\Indesign\cds.lib -hdlvar C:\Orcad Projects\Indesign\hdl.var -Append_log -logfile C:\Orcad Projects\Indesign\Detail.log -message -v93 C:\Orcad Projects\Indesign\stubI.vhd" as a child process.

Can not find this file. Process cancelled by user or Errors/Warnings encountered. ************************************************************************************************************************

Such error is with my own model of multiplexer.

How can I simulate with no errors?

Need I to reinstall ORCAD?

  • oldmouldy

    My guess would be that you do not "ncvhdl" installed. The logic language, VHDL and Verilog, simulators have not been supported, or updated, on the Windows platform for some while now. There used to be an NCVHDL Desktop version for Windows installations but the Incisive tools have been "UNIX only" for some years. You could probably create an EDIF netlist on Windows and then simulate on UNIX but this won't work directly from the Capture menu.

  • scdr
    oldmouldy said:
    There used to be an NCVHDL Desktop version for Windows installations
    What is the NCVHDL Desktop version for Windows?
    oldmouldy said:
    You could probably create an EDIF netlist on Windows and then simulate on UNIX but this won't work directly from the Capture
    How can I do this? What programs can I use?
  • oldmouldy

    NCVHDL Desktop is a version of the Native Compiled Simulators from Cadence. "Desktop" is a WIndows specific version of the simulator. You want to simulate the netlist so you are going to need a simulator that understands EDIF or VHDL and has the appropriate logic primitives for your design. You may still be able to get a license for NCVHDL Desktop from your local Cadence source but it is a while since this product was updated and it may be end of life now.

    You can create an EDIF or VHDL netlist from the Capture netlisters, you then need a simulator. EDIF is probably slightly preferable to VHDL since "ports" are "just ports" in EDIF, in VHDL they have direction properties and these need to match the simulation primitives to ensure success. You may be able to obtain a simulator from your FPGA vendor, this is usually the lowest cost route.

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