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Breaking power pins from global nets with similiar name

UCBrendan

Hello all,

I am having a problem with wiring up a heterogeneous part package in OrCad 16.2 and I am hoping that this would be the place to get some help.  In the schematic editor I have placed all the instances for a heterogeneous part (say U1A, U1B, U1C).  I want to identify unique power traces to the VCC and VSS power pins of the device.  So, instead of using VCC and VSS as global names, I want to wire up +5VDC and GND_SIGNAL to the VCC and VSS pins.  In the OrCad help menu it states that, by default, power pins are electrically tied to nets with the same name throughout the design.  To break this it lists two methods, both basically which make the power pins visible on the device. 

These methods do not prevent the DRC from finding errors with the design.  For all instances of the heterogeneous part, the DRC reports errors saying that the VCC pin has two net connections; (1) to the default "VCC" power plane and (2) to the unique net I have used as a power plane (+5VDC).  Using both methods in the help menu have not resolved this DRC error. It seems like I cannot break the defaut setting for naming power pins from an external trace, meaning that to resolve the issue I will have to manually go and change the pin names on these parts to match my unique names.  

As a general rule of thumb, does anyone know a good step-by-step method for placing all instances of a hetergeneous part, identifying which instance to visibally show the power pins (A,B, or C), how to display the power pins, and finally how to break the default wiring in OrCad where it wants to wire these pins to a net with the same name?

To my knowledge, this is a new problem with OrCad 16.2.  All of my usual tricks and trades to prevent these DRC errors which have worked in the past for OrCad16.0 do not seem to work.

 Thanks

 Brendan

 

  • Sorry if I have misunderstood your post... but have you used the POWER_GROUP property? Example: POWER_GROUP=VCC=+5VDC

     

  •  redwire

    Thanks for the response.  yes, I believe you understood correctly.  in a much shorter summary, the main problem is that parts from OrCad's generic libraries use POWER PIN definations on its power pins, which is defaulted to electrically connect to a global net with the same name.  i want to break this connection, or at least use my own power net names.

     I have not had any experience with the POWER_GROUP property.  It sounds like i can combine the unique power plane (+5VDC in my example) to the VCC plane.   However, if I have IC's with other power planes (like and third +5VISO), I don't want to use the POWER_GROUP = VCC + 5VDC + 5VISO since I want to keep +5VDC and +5ISO separate. 

    Can you please give me a little more information on how this property works? 

    Thanks

  • I believe you need to edit the part in schematic and set the power type pins on other gates (i.e. not gate A but for left out gates, such as B, C, etc.) such that they are set to Ignore.  Try out the following and see if this helps.

    - select part in schematic > right click > Edit Part

    - click View > Package

    - Edit > Properties (you should see pins for all gates in Package Properties)

    - check Ignore for power type pins in question for gates B and C (leave unchecked for gate A)

    - click OK > close Part Editor window > select Update All or Update Current

    - Save the design > create netlist

  • How about this. Make a small sample schematic and post it here. I think it's easier to solve by example.  Does not sound difficult unless something is drastically different about 16.2 (which I have but not really used beyond a couple of examples).

  • Thanks for the ideas ....

    I have found solution to the problem which eliminated the DRC errors between power pins on my parts.  The trick is that OrCad will automatically route power pins of a specific name (say "VCC") to global nets in the schematic with the same name.  This can be confussing when attempting to name your own power nets in the schematic or keep isolated power supplies.  To get around this you must edit the part and rename the power pin to match the power net name you wish to use in the schematic.  For my example, I opened the part and renamed the power pin to "+5VDC" and everything worked out fine.

    However, this brings up another problem when using heterogeneous parts.  Using the solution above, when doing this on a hetergeneous part, the user must do the same step, however when closing the part editor window, select "update all instances" insead of "update current instance".  The problem with "update current instance" is that the hetergeneous part you have selected will be resaved in the design cache with an updated part name (OrCad will automatically amend the current part source name with a "_1" or "_2" and so on everytime you same a library part in the local design cache), and the design will automatically reference only this instance of the part to the new design name.  What results is a series of DRC errors which state that the individual references of a hetergeneous part do not have the same package.   Again, a quick solution to this problem is to update all instances when closing the part editor window, however this can be problematic when the user wants to use this library part again somewhere else in the design with unique power pin nets.  My solution to this problem was to find another library part with the same pinout, or just copy the library part to a new library and rename it to something new.  

    Thanks for all the help.

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