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  3. Power and ground planes

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Power and ground planes

Mike27282
Mike27282 over 15 years ago

Is there any reason for 2 power planes not to share a ground plane? The stack-up would look like pwr1-gnd-pwr2. Each would have minimum spacing (2 - 3 mils) for max decoupling capacitance. This is a high speed digital board.

 

 

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  • redwire
    redwire over 15 years ago

     WIth half a question you get half an answer. :)  Nothing wrong with the idea but what about the *rest* of the PCB?  Where are the planes located?  Is this an asymmetric stackup?  How thick are the dielectrics?  What weight copper?  Where are the signals?  Too many unanswered questions to address your initial question....

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  • Mike27282
    Mike27282 over 15 years ago

    I'm okay with the rest of the board. pwr-gnd-pwr is something that I haven't done before. Here's the stack-up:

    Top Signal1

    Layer2: Power1

    Layer3: Ground

    Layer4: Power2

    Layer5: Signal2

    Layer6: Signal3

    Layer7: Power3

    Layer8: Ground

    Layer9: Signal4

    Layer10: Signal5

    Layer11: Power4

    Layer12: Ground

    Layer13: Power5

    Bottom: Signal6

    1 oz copper, fr408, 3 mils between pwr-gnd, 10 mils (maybe 7 mils) between signal 2/3 and 4/5, 50 ohm SE and 100 ohm diff Z

     

     

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  • redwire
    redwire over 15 years ago

     Are you familiar with "cap" lamination and "core" lamination?  Depending on where you spec core thicknesses you might end up with a higher cost board (core).  Cap lamination uses vacuum applied foil on the outer layers.

    You could try altering your stack up a hair like this.  Now signals are etched on core layers which fabricators prefer.  All power plane pairs are on cores.  You could then spec a core material like ZBC2000 or Oak Mitsui if you need buried capacitance.

    I would also consider swapping some of the power/gnd layers so that I had a high-speed GND-sig-sig-GND routing available if you need to worry about noise on high-speed pairs... (another topic?)

    Top Signal1

    Layer2: Power1

    Layer3: Ground

    Layer5: Signal2

    Layer6: Signal3

    Layer7: Power3

    Layer4: Power2

    Layer13: Power5

    Layer8: Ground

    Layer9: Signal4

    Layer10: Signal5

    Layer11: Power4

    Layer12: Ground

    Bottom: Signal6

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  • Mike27282
    Mike27282 over 15 years ago

    Thanks redwire. I found a solution.

    Top - signal

    Layer2 - ground

    Layer3 - power

    Layer4 - signal

    Layer5 - ground

    Layer6 - signal

    Layer7 - ground

    Layer8 - power

    Layer9 - signal

    Layer10 - ground

    Layer11 - signal

    Layer12 - power

    Layer13 - ground

    Bottom - signal

    The problem was that I had high speed lines going over power plane splits, and I thought adding ground layers would add a lot of work for the designer (due to changing line widths and spacing for controlled Z). I found out that it wasn't too much work, so I added 2 ground planes so that the signal layers do not have to rely on the split power planes for their return paths.

     

     

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  • redwire
    redwire over 15 years ago

     Sounds good.  Stackup looks fine.  Did the overall thickess change? :)

    Be sure to think about your return current when routing pwr/sig/gnd especially if you have signals going off to a backplane with different return layers.  If no external signals then use caps as signal return AC paths nearby the via.

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