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SMT Test Pads in Orcad PCB Editor 16.2

aaronkreider

I'm at my wits end.  I am attempting to create test pads for ICT on the bottom side of the PCB.  This is the first time I'm attempting this in Orcad.

I started in SETUP->DESIGN PARAMETERS->MFG APPLICATIONS->EDIT TEST PREP PARAMETERS

In the "General Parameters", I set:  Pad stack type = SMT / BLIND; Layer = Bottom; Test Method = Single; Min Pad Size = 35.

I then switched over to the "Padstack Selections"  tab.  In "Bottom side tespoint" "SMT testpad", I tried to select an SMT pad (with a size 40mil square) to use as my test pad. 

I get the error:  W-  WARNING: Padstack ICT_TP does not match the layer stackup ... REJECTED.

After trying a number of different settings in my Padstack Designer, I have found that Editor will only allow me to select any THR padstack (with a large enought pad of course) even though it should only allow an SMT padstack.

Am I missing something!?!?  Any help would be appreciated.

Thanks!

I'm running PCB Editor 16.2 s005 (V16-2-57s) and Pad Designer 16.2 s005 (V16-2-57p).

  • Rik Lee

    The padstack needs to be only defined on the bottom layer.

    Create a new padstack
    Enter the corect parameters for the END_LAYER (Circle, square, rectangle; height/width etc. just as you woudl a top pad.)
    Change the padstack to 'Single layer mode'
    Save the padstack

    In the testprep parameters use the padstack you saved aboved as the Bottom SMT pad.

    ~Rik

  • aaronkreider

     Ah HA!  That fixed it.  Thank a bunch Rik!

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