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  3. Edit and Show reference designator/pin numbers in Cadence...

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Edit and Show reference designator/pin numbers in Cadence Design Entry

EdwardHU
EdwardHU over 16 years ago

In the transition to use Cadence PCB tools. Have used Altium/PCAD a lot in my previous careers.

Unfamiliar with the way that Cadence tool processes. After I add a component to the schematics entry tool (concept), why I don't see the reference designator and the pin numbers of the component? I tried all menu and have not found a way to do it.

Regards,

Ed

 

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  • Jerry GenPart
    Jerry GenPart over 16 years ago
    Hi Ed!

    The process is slightly different in the schematic entry tool (ConceptHDL – now known as Design Entry HDL – DEHDL) compared to other schematic tools.

    You’re essentially adding the logic (adding parts), establishing the connectivity (wiring pins on parts), and providing constraints (via the Constraint Manager or object attributes) when constructing the schematic. Rather than adding the reference designators and pin numbers to parts (as you place them), you simply save the design, then run Export Physical. You don’t need to pass the netlist to the PCB Board at this point, just run Export Physical (with the option to backannotate the schematic). When this is done, all the parts will now have the reference designators and pin numbers displayed.

    There are times, of course, when you’d like to “fix” these values so that the PCB Designer cannot swap ref des values or pin numbers. To do this, simply use the Attribute command in DEHDL, and add the property LOCATION with a value (e.g. LOCATION=U47). Also, to fix a pin number (typical for a connector), use the DEHDL Section command and click on a pin stub. For example – SECTION 23 (and then click on a pin stub of a part) will place pin# 23 on that pin.

    Hope this helps!

     

    Jerry
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  • EdwardHU
    EdwardHU over 16 years ago

    Thanks, Jerry!

     A few more "stupid" questions...

    I saw sometimes the schematics entry is calles "Design Entry CIS" while sometimes referred to "Design Entry HDL". Are they referring to the same schematics entry software, or differentiated by the input format?

    I tries to find out the design flow from a schematics entry to simulation but have not found a tutorial. Is the simulation done in the Concept usually digital simulation with verilog format and analog simulation in the AMS with spice format? Would appreciate if you can point to me a link to a simulation tutorial? 

     

     

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  • Jerry GenPart
    Jerry GenPart over 16 years ago
    Hi Ed,

    Glad to help! In the SPB product area, there are  actually three unique design authoring (schematic capture) products – Design Entry CIS (this is the OrCAD Capture-CIS schematic entry product), Design Entry HDL (this is the Enterprise level schematic entry product – formerly known as ConceptHDL), and Allegro System Architect (ASA – a table/spreadsheet product for entering logical connectivity).

    As for simulation, you can use CIS and DEHDL for AMS PSpice simulation. DEHDL and ASA can be used for Verilog/VHDL digital simulation as well as mixed-signal (analog and digital) simulation. I’d suggest you look in your Cadence tools installation path, then under \doc\concepthdl_tutmast and the file concepthdl_tutmast.pdf. This provides you all the flow information you’d need for simulation.

     

    Jerry
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  • EdwardHU
    EdwardHU over 16 years ago

    Thanks, Jerry, your previous emails do help!

    While I am facing a new issue here. I am practicing the AMS simulation. However somehow my AMS simulation menu as well as the analog tool bar remains grey after my schematics entry. It is a very simple design with components from pspice_elem and other simple resistor, cap and diodes. The stimulate component is from sourcestim.

    I am trying to add a screen shot, but is not successful. Could you brief the possible reasons that analog simulations become inactive. There are no errors in the schematics and I am able to load a sample program and the simulation menu is active.

    Appreciate your help! 

     

         

     

     

     

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  • Jerry GenPart
    Jerry GenPart over 16 years ago

    Hi Ed,

     

    I think this Cadence Online Support Solution will help –

    http://support.cadence.com/wps/myportal/cos/COSHome/viewsolution/!ut/p/c5/dc1JDoJAFATQs3iC_xsF2yVBQUQxAkHpDWkVjNJTxPn0ohtXVq3rFTDoqvjteOCXo1ZcwAaYUxIr8Eg0wBEd-xTDgCyyPLQRsQ_rz8Ip8U9chALY8CcsvbgTqBNHST75CrnSZ9k9ZbDBQZme0MyytH9_7l5zomkbpSYmqyryl7USM9bY19oWVSFNsjXJQ3MpNA-ILJxqz4XXem6QSWva9iCealmBadTLp27vDbNgb90!/dl3/d3/L2dBISEvZ0FBIS9nQSEh/

     

    Why are the AMS Simulator Menus grayed out?


    Error Message

    None

    Problem

    Why are the AMS Simulator Menus grayed out after installing a recent Hotfix/ISR?

    Solution

    An enhancement has been added to the Allegro Design Entry HDL AMS Simulator Flow in one of the recent ISRs/Hotfix. This enhancement differentiates the Simulation enabled (AMS Simulator) flow from the PCB Design (normal) flow.

     

    The AMS Simulator Menu is now grayed out by default. To enable AMS Simulator, select AMS Simulator > Enable PSpice Simulation in Design Entry HDL.

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    Document attributes

    Solution ID:

    11593286

    Created:

    10/15/2009 09:29:17

    Last Modified:

    10/19/2009 05:21:49

    Product:

    Allegro AMS Simulator

    Product Version:

    16.2

    HW Platform:

    Windows

    O/S Version:

    XP Pro

    SW Release:

     

     

     

    Jerry

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