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  3. Design HDL [Concept] page reset/renumbering

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Design HDL [Concept] page reset/renumbering

KerryMurphy
KerryMurphy over 16 years ago

Hello all.

OK, apparently in some manner I'm having issues with my schematic pages where they get renumbered. Not sure how that can occur if you're not adding / inserting / removing pages during the capture of the schematic, but it has happened. Can anyone share their expertise in how this can be corrected? I'm aware of the keyboard commands 'force page reset' and so forth, but maybe there's a way to get things back w/o having to go to each page and run this command - like when you have 10+ pages it would be much less time w/o using the keyboard command. Hope to hear something soon - have a good one.

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  • grasshopper
    grasshopper over 16 years ago

     The Logic Design Forum is intended for Formal Verification, DFT, and Synthesis. I believe the Packaging / SPB forum will be able to help you with your question

    thanks,

    gh-

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  • Jerry GenPart
    Jerry GenPart over 16 years ago
    Hi –

    In DEHDL, you can try the “hier_write forcereset” command. That will run through

    the forcereset command across the entire hierarchy.

    Let us know if that resolves it for you.

    Jerry
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