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High Voltage Issues

Garry
I have a situation where we have 10KV coming in on our board in 2 or 3 places and we use resistor strings to the usable voltages.  I know a little about the net class but I have never used them.  I also have these same resistor strings that have step down voltage differences as well.  Has anyone out there done anything like this and set up design rule checks for this situation?
HV_Lines.doc
  • EvanShultz

     You'll want to use Constraint Manager (CM) for this. Set up a Spacing Constraint Set (SCS) like 10kV, 8.4kV, 6.8kV, etc. Or use whatever name works for you. Set the spacing from Line to all other elements on each SCS to the distance you want to keep everything away from these HV Clines. Then apply the relevant SCS to each net. That should do it!

     You could get fancier with net classes and set up special net class-class rules, but I think the above is easier if you're just getting into CM. CM is exceptionally powerful but you have to play around with it.

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