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padstack management

eephillip

 I keep a single folder of padstacks, and do my best to adhere to the IPC naming conventions. Lets say I make a part using some pads in that folder. Then someone comes in and overwrites my padstack with the same name but with a slightly different geometry. I generate a netlist and during the process of importing logic into my brd file it seems that all the parts get a padstack refresh from the pad library. I start placing my parts and they are all incorrect due to the modification of said padstack.

My question, is how is this supposed to be managed? How can I quickly merge two groups of padstacks? I will have multiple sources of padstacks from different designers and I’ll need to merge them together, but I need to verify that a r130_150.pad is the same pad that exists in the library already. Do I resort to opening up two pad designers and verify that they are indeed the same pad?

  I know the ICP naming convention is supposed to help with this but only in a perfect world. 

 Anyone here with experience with this sort of thing, thanks, phillip

  • mcatramb91

    Hello,

    This is the way the tool works.  While generating the part you access the library of padstacks and define your pins. Saving the part (.dra) and generating the symbol (.psm) which is used when placing the component in your design but it only looks at the name of the padstack and grabs the latest padstack from the library not the one used when the part was original generated. (Which you have seen)

    One other thing to note, if the padstack already exists in the design it will use that padstack first and not look at the padstack defined in the library, in this case you would need to refresh the padstack in the design using either "Tools > Padstack > Replace..." or "Tools > Padstack > Refresh..."

    As far as the compare of different sets of padstacks, you could generate a Padstack Definition Report from both padstacks then load them into a Excel Spreadsheet for side by side compare using some simple formulas.

    From a DOS Prompt you could run the report command:   report  -v  pad  r130_150.pad  r130_150_library.csv

    The r130_150_library.csv is a comma delimited file of the entire padstack definition that can be easily read into an Excel Spreadsheet for a compare.  I don't know of an easier way of doing the padstack compare other than opening up two pad designers. 

    As a side note, there is a Report available from Pad Designer to generate a "Library Drill Report" for the entire library that could be saved as a CSV or HTML File but as its name states it will only reports the Drill information only from the library padstacks.

    Hope this helps,
    Mike Catrambone
    Plexus Engineering Solutions

  • eephillip
    Good stuff, it just reiterates the need for tight control over the pad library that is feeding the CIS/CIP-E part database. Having a command line report opens up some possibilities of automating the process. Does cadence document these command line interfaces somewhere?
  • Ejlersen

    Hi

    Yes, they're all documented in the folder %CDSROOT%\share\pcb\batchhelp e.g. C:\Cadence\SPB_16.3\share\pcb\batchhelp

    there's a text document describing each command line interface.

    Best regards

    Ole

  • mcatramb91

    Great tip Ole.

    eephillip,

    I would check out the documentation as well.  In Allegro, select Documentation from the Help Menu to start Cadence Help.  Once the Cadence Help is open select "Physical Layout Command Reference" to see all the commands that can be used inside and outside of Allegro.

    Another good tip is to type helpcmd on the Allegro Command line to open a browser of internal Allegro commands. 

    Selecting the Help Radio button at the top of the form then select a command to open up the online help for the command.  Pretty useful.

    Hope this helps,
    Mike Catrambone
    Plexus Engineering Solutions

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