• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design
  3. Length matching multi-device serial bus with chip selec...

Stats

  • Locked Locked
  • Replies 6
  • Subscribers 165
  • Views 14634
  • Members are here 0
More Content
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Length matching multi-device serial bus with chip selects

pcbeng25
pcbeng25 over 14 years ago

I am trying to write routing rules for Allegro PCB Router v16.3 to match trace lengths for a serial bus (clk/data) with a chip select for each device on the chain.  The source FPGA devA needs to deliver a clock, data, and CS to each of 4 devices on the chain.  The clk and data lines go from devA -> dest1 -> dest2 -> dest3 -> dest4.  There are 4 chip selects which go directly from devA to each of the destinations.  Each CS line has to be length matched with the clk and data line segments from devA to its particular destination.  I have tried to make groups and group sets along with the match_group_length command, but it seems to match all the CS lines to the total routed length of the clock and data lines instead of the segments leading up to the destination.

 define (group uclk0 (fromto devA dest1))
define (group udat0 (fromto devA dest1))
define (group ucs0 (fromto devA dest1))
define (group_set uwire0 uclk0 udat0 ucs0)
circuit group_set uwire0 (match_group_length on (tolerance 0.05))
rule group_set uwire0 (patterns_allowed accordian)
rule group_set uwire0 (limit_way 7)

define (group uclk1 (fromto devA dest1) (fromto dest1 dest2))
define (group udat1 (fromto devA dest1) (fromto dest1 dest2))
define (group ucs1 (fromto devA dest2)))
define (group_set uwire1 uclk1 udat1 ucs1)
circuit group_set uwire1 (match_group_length on (tolerance 0.05))
rule group_set uwire1 (patterns_allowed accordian)
rule group_set uwire1 (limit_way 7)

 define (group uclk2 (fromto devA dest1) (fromto dest1 dest2) (fromto dest2 dest3))
define (group udat2 (fromto devA dest1) (fromto dest1 dest2) (fromto dest2 dest3))
define (group ucs2 (fromto devA dest3))
define (group_set uwire2 uclk2 udat2 ucs2)
circuit group_set uwire2 (match_group_length on (tolerance 0.05))
rule group_set uwire2 (patterns_allowed accordian)
rule group_set uwire2 (limit_way 7)

define (group uclk3 (fromto devA dest1) (fromto dest1 dest2) (fromto dest2 dest3) (fromto dest3 dest4))
define (group udat3 (fromto devA dest1) (fromto dest1 dest2) (fromto dest2 dest3) (fromto dest3 dest4))
define (group ucs3 (fromto devA dest4)))
define (group_set uwire3 uclk3 udat3 ucs3)
circuit group_set uwire3 (match_group_length on (tolerance 0.05))
rule group_set uwire3 (patterns_allowed accordian)
rule group_set uwire3 (limit_way 7)

 

These rules conflict though apparently because fromtos are shared between them.  Is there a way of doing this and achieving the desired result?

 

  • Cancel
  • pcbeng25
    pcbeng25 over 14 years ago

    For anyone who looks at this thread, hoping to figure it out for themselves, I will provide the following from my rules file which works like a charm for matching the chip select lines to the clock and data lines.  Oh and Units are inches, so (tolerance 1) means 1 inch.

     

     ### UWIRE Communication Interface ##

    define (class uwire)
    define (class uwire (add_net UWIRE.*))
    define (net UWIRE.CLK (fromto U1100-T25 U903-4) (fromto U903-4 U900-33) (fromto U900-33 U803-4) (fromto U803-4 U800-33))
    define (net UWIRE.DAT (fromto U1100-R25 U903-5) (fromto U903-5 U900-32) (fromto U900-32 U803-5) (fromto U803-5 U800-32))
    define (class uwire_bus (add_net UWIRE.CLK))
    define (class uwire_bus (add_net UWIRE.DAT))

    define (group uclk0 (fromto U1100-T25 U903-4))
    define (group udat0 (fromto U1100-R25 U903-5))
    define (group ucsl0 (fromto U1100-V27 U903-6))
    define (group_set uwire0 uclk0 udat0 ucsl0)
    circuit group_set uwire0 (match_group_length on (tolerance 1))
    rule group_set uwire0 (patterns_allowed accordian)
    rule group_set uwire0 (limit_way 200)

    define (group uclk1 (fromto U1100-T25 U900-33))
    define (group udat1 (fromto U1100-R25 U900-32))
    define (group ucsl1 (fromto U1100-T20 U900-34))
    define (group_set uwire1 uclk1 udat1 ucsl1)
    circuit group_set uwire1 (match_group_length on (tolerance 1))
    rule group_set uwire1 (patterns_allowed accordian)
    rule group_set uwire1 (limit_way 200)

    define (group uclk2 (fromto U1100-T25 U803-4))
    define (group udat2 (fromto U1100-R25 U803-5))
    define (group ucsl2 (fromto U1100-V28 U803-6))
    define (group_set uwire2 uclk2 udat2 ucsl2)
    circuit group_set uwire2 (match_group_length on (tolerance 1))
    rule group_set uwire2 (patterns_allowed accordian)
    rule group_set uwire2 (limit_way 200)

    define (group uclk3 (fromto U1100-T25 U800-33))
    define (group udat3 (fromto U1100-R25 U800-32))
    define (group ucsl3 (fromto U1100-T21 U800-34))
    define (group_set uwire3 uclk3 udat3 ucsl3)
    circuit group_set uwire3 (match_group_length on (tolerance 1))
    rule group_set uwire3 (patterns_allowed accordian)
    rule group_set uwire3 (limit_way 200)

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
<
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information