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Schematic <--> Layout Synchronization

AitneInc

To begin, I am a student using the OrCAD/Allegro 16.2 design package to modify the "BeagleBoard-xM" design for our specific project. I am having issues with my design. An original schematic (OrCAD Design) and board file (Allegro PCB Design) were provided for the project I am currently modifying. Using these two files, I needed to remove select components and signals from the original schematic. When I began, I removed each component and signal on the schematic, but no changes were updated on the board file; therefore I went through the board file in Allegro and deleted each component based off of the changes made in the schematic.After presenting the changes to the professors who are advising, they said that our design will not be accepted unless we can synchronize the ORIGINAL schematic and board file, so that, when a component is deleted in the schematic the component is simultaneously removed from the layout and the board file is updated. 

 How can I go about doing this properly? Are there are tutorials available? If possible, could someone help me out and guide me through the process so that I can re-modify our design as quickly as possible? I can be available through email or phone.

 Thank you.

Kyle

  • redwire

     Well, this IS what OrCAD + Allegro does -- it keeps the two synchronized and parts are automatically added/deleted.

    So what did you do when you netlisted?  If you use the netlist tool in OrCAD  it allows you to update the board and choose whether or not to delete the copper associated with the changes.

  • AitneInc

    That is what I thought, but when I removed components in the schematic, nothing was changed on the layout. Am I missing a step or are the files just not connected properly?

  • redwire

     It sounds like you might be doing a different process such as the 3rd party netlist  or Logic->import method -- neither of which is appropriate for OrCAD<>Allegro netlisting but it seems to be pervasive on this forum.

    Can you elaborate -- maybe add some screen shots?


    You should be following the Tools->Create Netlist flow (see attached image)

  • Lancia1

    I guess what you mean is to get real time LVS funciton, like you click one part on the schematic/layout, the counter part highlighted in the layout/schematic.

    I am not sure if this function is integrated in Allegro, from their poster, link below, it seems the function is available, but we have not found any clue to run it.

    https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/tools/ic-package-design-analysis/sip-digital-design-ds.pdf

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