• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design
  3. power integrity - VRM MODEL

Stats

  • Locked Locked
  • Replies 2
  • Subscribers 164
  • Views 1091
  • Members are here 0
More Content
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

power integrity - VRM MODEL

Shashi Ranjan
Shashi Ranjan over 14 years ago
Whenever I'm Trying to add a VRM a warning message says-" VRM cannot be placed outside the plane group boundaries." What could be the solution?
  • Cancel
  • Dennis Nagle
    Dennis Nagle over 14 years ago

    It means that you are trying to place the VRM in a location where it cannot connect to the DC nets you are trying to analyze. More specifically, your location is outside the boundaries of the shapes on the plane layers you've selected.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Shashi Ranjan
    Shashi Ranjan over 14 years ago
    Thanks, I got the point.
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information