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line to smd pin spacing DRC error when deleting routed nets

Dhiraj

Hello everyone!

Though i am not new to PCB design, i have some serious problem here .. some one please help me out!

I am using cadence OrCAD 16.0 .. I am designing a 12 layer Virtex-5 based board and i have almost completed 60% of the routing process .. Off late, i had to make a few changes in the schematic, i.e., remove a few connnections .. when i am done with schematic editing,i have updated the net list and imported logic in allegro pcb editor as i always do.

But, 176 DRC errors were raised saying "line to smd pin spacing" ..I thought removing/deleting the routed lines wil solve the problem .. but it did not.I have deleted all the unwanted routed nets from the design, but still these errors remain ..

If this problem cannot be resolved, the only option left with me is to go back and start routing from scratch ..

Some one please help me how to resolve this issue .. Thank you ..

  • girish

    *Run databse check   Tools>database check:update all DRC's

    *What is the constraint type ?  Same net DRC ?

     If not solved attach the DRC report once here 

    Regards,

    Girish Kumar 

  • Dhiraj

    Thank you Mr. Girish, I really appretiate your concern.

    The problem is solved. This looks funny though! but, when i deleted the unwanted nets first and then imported logic, i did not get any errors.

    I don't know why it gave me hell of errors when  i did it the reverse way.

    Any way, thank you for responding. 

     

     

     

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